58 lines
841 B
Plaintext
58 lines
841 B
Plaintext
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4f";
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};
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cpu@1 {
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compatible = "arm,cortex-m0+";
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};
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};
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sram0:memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 0x10000>;
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};
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sram1:memory@20010000 {
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compatible = "mmio-sram";
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reg = <0x20010000 0x10000>;
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};
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sram2:memory@20020000 {
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compatible = "mmio-sram";
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reg = <0x20020000 0x8000>;
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};
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sramx:memory@40000000{
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compatible = "mmio-sram";
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reg = <0x40000000 0x8000>;
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};
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soc {
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flash0:flash@0 {
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reg = <0 0x40000>;
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};
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usart0:usart@40086000 {
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compatible = "nxp,lpc-usart";
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reg = <0x40086000 0xE44>;
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interrupts = <14 0>;
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label = "USART_0";
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status = "disabled";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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