zephyr/drivers/spi/Makefile

obj-$(CONFIG_SPI_INTEL) += spi_intel.o
obj-$(CONFIG_SPI_DW) += spi_dw.o
obj-$(CONFIG_SPI_QMSI) += spi_qmsi.o
obj-$(CONFIG_SPI_QMSI_SS) += spi_qmsi_ss.o
obj-$(CONFIG_SPI_K64) += spi_k64.o
spi: Rename files according to rules Renaming files as: <domain>_<model or manufacturer>.<c/h> Change-Id: I018f6fdb4ba8aac8bb96e848f0f3633bd032b44e Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com> 2016-01-14 21:48:12 +08:00			`obj-$(CONFIG_SPI_INTEL) += spi_intel.o`
			`obj-$(CONFIG_SPI_DW) += spi_dw.o`
spi: Add QMSI-based implementation This driver uses the QMSI library and mostly translates calls from the Zephyr API to QMSI ones. This driver conflicts with the native driver implemenation. In order to enable it, you must set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="PATH_TO_QMSI" CONFIG_SPI_QMSI=y CONFIG_SPI_QMSI_PORT_0=y CONFIG_SPI_QMSI_PORT_1=y Missing: - Support for using a GPIO pin as Chip Select; Change-Id: I0d8eca88a2a803b6b3604f396f874313fe90753c Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> 2016-01-28 20:42:12 +08:00			`obj-$(CONFIG_SPI_QMSI) += spi_qmsi.o`
spi: quark se: Add QMSI 1.1-based SPI shim driver Add SPI sub-driver for sensor system. Use SPI irq number definitions already in Zephyr header file. Origin: Original Change-Id: I215db3acc535093dd75c0817cbe5af77e6e76e16 Signed-off-by: Baohong Liu baohong.liu@intel.com Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2016-04-12 00:30:43 +08:00			`obj-$(CONFIG_SPI_QMSI_SS) += spi_qmsi_ss.o`
arm: K64 SPI module driver Support for Freescale/NXP K64 SPI modules, limited to: - Master mode - A single active set of clock and transfer attributes (CTAR0), which includes non-adjustable delay parameters - Tx FIFO fill and Rx FIFO drain interrupt handling - Standard, continuous select and continuous SCK SPI transfer formats Also, divide-by-zero code generation in this driver is prevented. The 'volatile' attribute is added to some of the variables in the baud rate and delay calculation functions of the K64 SPI driver in order to prevent bad code generation by gcc toolchains for ARM seen when an optimization setting above -O0 is used. Specifically, a register is loaded with the constant 0 and is used as the divisor in a following divide instruction, resulting in a divide-by-zero exception. This issue has been seen with gcc versions 4.8.1 (the VxWorks toolchain) and 5.2.0 (the Zephyr SDK toolchain). Change-Id: Ib5b2b748aad8fdfd5e8d40544e6e1abef3713abe Signed-off-by: Jeff Blais <jeff.blais@windriver.com> 2016-02-19 03:38:32 +08:00			`obj-$(CONFIG_SPI_K64) += spi_k64.o`