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zephyr/arch/arc/soc/quark_se_ss/Makefile

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Move compiler optimization to the SoC Decisions on compiler optimizations were done on the architecture level, this does not scale and some SoCs will have different optimization levels or compiler options needed. Moving this to the SoC makes it easy to optimize differently when using the same CPU which we use to set the right optimization now on the architecture level. For IAMCU platforms, use the right architecture and tuning. -march=lakemont -mtune=lakemont -miamcu -msoft-float Change-Id: I458afca5feb9be5de8dcae559d6dcac3c6d6a2a7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-01-13 20:49:42 +08:00
arch-cflags = $(call cc-option,-mARCv2EM) \
$(call cc-option,-mav2em,) $(call cc-option,-mno-sdata)
quark se: build sensor subsystem files Change-Id: I4490823450dd5fab0c04bece9e61481958ab3843 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-18 20:40:07 +08:00
KBUILD_CFLAGS += -DQM_SENSOR=1
Move compiler optimization to the SoC Decisions on compiler optimizations were done on the architecture level, this does not scale and some SoCs will have different optimization levels or compiler options needed. Moving this to the SoC makes it easy to optimize differently when using the same CPU which we use to set the right optimization now on the architecture level. For IAMCU platforms, use the right architecture and tuning. -march=lakemont -mtune=lakemont -miamcu -msoft-float Change-Id: I458afca5feb9be5de8dcae559d6dcac3c6d6a2a7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-01-13 20:49:42 +08:00
KBUILD_AFLAGS += $(arch-cflags)
KBUILD_CFLAGS += $(arch-cflags)
KBUILD_CXXFLAGS += $(arch-cflags)