2023-03-25 00:17:55 +08:00
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# Copyright (c) 2023 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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config ARM_SIP_SVC_HAS_INTEL_SDM_MAILBOX_FIFO
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bool
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default y
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2023-05-30 12:04:29 +08:00
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depends on DT_HAS_INTEL_SOCFPGA_AGILEX_SIP_SMC_ENABLED
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2023-03-25 00:17:55 +08:00
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imply ARM_SIP_SVC_HAS_DRIVER
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help
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Support for SDM mailbox fifo in Intel SoC FPGA Agilex via SMC calls.
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config ARM_SIP_SVC_EL3_MAILBOX_RESPONSE_SIZE
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int "Size of response buffer used for ASYNC transactions."
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default 4096
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depends on ARM_SIP_SVC_HAS_INTEL_SDM_MAILBOX_FIFO
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help
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Size of response buffer used for ASYNC transactions.For Intel Agilex platform
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the maximum size of response buffer size is 4096 and minimum is 4 bytes.
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Also it should be multiple of 4 bytes.
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config ARM_SIP_SVC_EL3_MAX_ALLOWED_TRANSACTIONS
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int "Maximum allowable ongoing transactions."
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default 16
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depends on ARM_SIP_SVC_HAS_INTEL_SDM_MAILBOX_FIFO
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help
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Allowed number of active transactions in sip_svc subsystem for this driver.
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