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zephyr/boards/riscv/longan_nano/longan_nano_defconfig

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boards: riscv: Add SiPeed Longan Nano platform SiPeed Longan Nano is a minimal development board based on GigaDevice's RISC-V processor. There are 2 board variations. longan_nano: GDGD32VF103CBT6 (128K Flash/32K SRAM) longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM) Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-10-18 22:44:47 +08:00
# Sipeed longan nano Development Board Configuration
#
# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
#
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_GD32VF103=y
CONFIG_SOC_GD32VF103=y
boards: riscv: longan_nano: Add BOARD definition Define missing definition BOARD_LONGAN_NANO to defconfig. And cleaning up some verbose comments. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-01-28 11:15:50 +08:00
CONFIG_BOARD_LONGAN_NANO=y
boards: riscv: Add SiPeed Longan Nano platform SiPeed Longan Nano is a minimal development board based on GigaDevice's RISC-V processor. There are 2 board variations. longan_nano: GDGD32VF103CBT6 (128K Flash/32K SRAM) longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM) Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-10-18 22:44:47 +08:00
boards: riscv: longan_nano: Add BOARD definition Define missing definition BOARD_LONGAN_NANO to defconfig. And cleaning up some verbose comments. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-01-28 11:15:50 +08:00
CONFIG_GD32_HXTAL_8MHZ=y
boards: riscv: Add SiPeed Longan Nano platform SiPeed Longan Nano is a minimal development board based on GigaDevice's RISC-V processor. There are 2 board variations. longan_nano: GDGD32VF103CBT6 (128K Flash/32K SRAM) longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM) Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-10-18 22:44:47 +08:00
CONFIG_RISCV_MACHINE_TIMER=y
drivers: serial: Add USART support for GD32V Modifying configuration to enable with gd32vf103 - Add usart definition to devicetree. - Define USART_STAT as alias of USART_STAT0 if not defined it. - Enable USART if SOC_SERIES_RISCV_GIGADEVICE_GD32VF103. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-05 07:56:48 +08:00
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y