54 lines
1.2 KiB
Plaintext
54 lines
1.2 KiB
Plaintext
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# Zephyr Kernel Configuration
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CONFIG_ARM=y
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CONFIG_ARCH="arm"
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CONFIG_SOC="stm32f030x8"
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CONFIG_SOC_SERIES="stm32f0"
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CONFIG_SOC_FAMILY="st_stm32"
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CONFIG_BOARD="nucleo_f030r8"
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CONFIG_SOC_SERIES_STM32F0X=y
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# Platform Configuration
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_STM32F030X8=y
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CONFIG_BOARD_NUCLEO_F030R8=y
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# General Kernel Options
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_SERIAL_HAS_DRIVER=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_UART_STM32=y
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_2=y
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# enable console on this port by default
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Pinmux Driver
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# GPIO Controller
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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CONFIG_GPIO_STM32_PORTA=y
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CONFIG_GPIO_STM32_PORTB=y
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CONFIG_GPIO_STM32_PORTC=y
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# Clock configuration
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CONFIG_CLOCK_CONTROL=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# HSE configuration
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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# PLL configuration
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# produce 48MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_PREDIV=1
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CONFIG_CLOCK_STM32_PLL_MULTIPLIER=6
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=1
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