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zephyr/boards/riscv/hifive1/hifive1_defconfig

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license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 21:08:09 +08:00
# SPDX-License-Identifier: Apache-2.0
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-18 01:17:05 +08:00
CONFIG_RISCV=y
riscv: freedom: rename RISCV32 to RISCV This code is common to 32- and 64-bit builds. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-19 11:05:53 +08:00
CONFIG_SOC_SERIES_RISCV_SIFIVE_FREEDOM=y
CONFIG_SOC_RISCV_SIFIVE_FREEDOM=y
boards: SiFive HiFive1 board Added support for the HiFive1 board from SiFive Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> Signed-off-by: Karol Gugala <kgugala@antmicro.com> Signed-off-by: Tomasz Jurtsch <tjurtsch@antmicro.com>
2018-04-05 04:11:07 +08:00
CONFIG_BOARD_HIFIVE1=y
CONFIG_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_SERIAL=y
riscv: Rename the FE310 SoC to Sifive Freedom FE310 is the name of one SoC out of a range of products in the SiFive Freedom line. The FE310 SoC port in Zephyr is compatible with all of these products, so rename the SoC to SiFive Freedom Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-08-16 06:41:21 +08:00
CONFIG_UART_SIFIVE=y
CONFIG_UART_SIFIVE_PORT_0=y
boards: SiFive HiFive1 board Added support for the HiFive1 board from SiFive Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> Signed-off-by: Karol Gugala <kgugala@antmicro.com> Signed-off-by: Tomasz Jurtsch <tjurtsch@antmicro.com>
2018-04-05 04:11:07 +08:00
CONFIG_UART_CONSOLE=y
riscv32: riscv-privilege: integrate common code This commit moves code from fe310 platform into RISC-V privilege common folder. This way the code can be reused by other platforms in future. signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-11 01:02:14 +08:00
CONFIG_PLIC=y
boards: SiFive HiFive1 board Added support for the HiFive1 board from SiFive Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> Signed-off-by: Karol Gugala <kgugala@antmicro.com> Signed-off-by: Tomasz Jurtsch <tjurtsch@antmicro.com>
2018-04-05 04:11:07 +08:00
CONFIG_PINMUX=y
riscv: Rename the FE310 SoC to Sifive Freedom FE310 is the name of one SoC out of a range of products in the SiFive Freedom line. The FE310 SoC port in Zephyr is compatible with all of these products, so rename the SoC to SiFive Freedom Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-08-16 06:41:21 +08:00
CONFIG_PINMUX_SIFIVE=y
boards: SiFive HiFive1 board Added support for the HiFive1 board from SiFive Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> Signed-off-by: Karol Gugala <kgugala@antmicro.com> Signed-off-by: Tomasz Jurtsch <tjurtsch@antmicro.com>
2018-04-05 04:11:07 +08:00
CONFIG_RISCV_MACHINE_TIMER=y
CONFIG_GPIO=y
riscv: Rename the FE310 SoC to Sifive Freedom FE310 is the name of one SoC out of a range of products in the SiFive Freedom line. The FE310 SoC port in Zephyr is compatible with all of these products, so rename the SoC to SiFive Freedom Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-08-16 06:41:21 +08:00
CONFIG_GPIO_SIFIVE=y
boards/hifive1: Enable SPI driver Enable the SPI driver on the HiFive 1 This makes the following configurations choices for the HiFive 1: The SPI 0 peripheral driver is not enabled by default because it is in charge of mapping the SPI flash into memory. This can be configured using the CONFIG_SIFIVE_SPI_0_ROM KConfig option. The SPI 1 peripheral driver is enabled by default and the pinmux is configured for all of its outputs The SPI 2 peripheral driver is enabled by default because it is present in the DTS for the FE310, but because the QFN48 package used on the HiFive 1 doesn't route those pins from the silicon die, the pinmux can't enable the SPI 2 pins. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2018-11-22 03:43:48 +08:00
CONFIG_SPI=y
CONFIG_SPI_SIFIVE=y
boards: SiFive HiFive1 board Added support for the HiFive1 board from SiFive Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> Signed-off-by: Karol Gugala <kgugala@antmicro.com> Signed-off-by: Tomasz Jurtsch <tjurtsch@antmicro.com>
2018-04-05 04:11:07 +08:00
CONFIG_BOOT_BANNER=y