zephyr/dts/riscv32/pulpino.dtsi

/*
 * Copyright (c) 2018 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <dt-bindings/gpio/gpio.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "pulp,ri5cy", "riscv";
			reg = <0>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "pulp,pulpino-soc", "simple-bus";
		ranges;

		itim: itim@0 {
			compatible = "pulp,pulpino0itim";
			reg = <0x0 0x8000>;
		};

		dtim: dtim@100000 {
			compatible = "pulp,pulpino-dtim";
			reg = <0x100000 0x8000>;
		};

		uart0: uart@1a100000 {
			compatible = "ns16550";
			reg = <0x1a100000 0x1000>;
			label = "UART_0";
			clock-frequency = <2500000>;
			interrupts = <24>;
			interrupt-parent = <&intc>;

			status = "disabled";
		};

		gpio0: gpio@1a101000 {
			compatible = "pulp,pulpino-gpio";
			gpio-controller;
			reg = <0x1a101000 0x1000>;
			interrupts = <25>;
			interrupt-parent = <&intc>;
			label = "GPIO";
			status = "disabled";
			#gpio-cells = <2>;
		};

		intc: interrupt-controller@1a104000 {
			#interrupt-cells = <1>;
			compatible = "pulp,pulpino-event-unit";
			interrupt-controller;
			reg = <0x1a104000 0x1000>;
		};
	};
};