52 lines
1.1 KiB
C
52 lines
1.1 KiB
C
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/*
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* Copyright (c) 2023 Benjamin Björnsson <benjamin.bjornsson@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief System/hardware module for STM32C0 processor
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*/
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/arch/cpu.h>
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#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
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#include <zephyr/arch/arm/aarch32/nmi.h>
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#include <zephyr/irq.h>
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#include <zephyr/linker/linker-defs.h>
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#include <string.h>
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/**
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* @brief Perform basic hardware initialization at boot.
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*
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* This needs to be run from the very beginning.
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* So the init priority has to be 0 (zero).
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*
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* @return 0
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*/
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static int stm32c0_init(const struct device *arg)
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{
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uint32_t key;
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ARG_UNUSED(arg);
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key = irq_lock();
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/* Install default handler that simply resets the CPU
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* if configured in the kernel, NOP otherwise
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*/
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NMI_INIT();
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irq_unlock(key);
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, system core clock is set to 48 MHz from HSI */
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SystemCoreClock = 48000000;
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return 0;
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}
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SYS_INIT(stm32c0_init, PRE_KERNEL_1, 0);
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