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zephyr/samples/sensor/thermometer/sample.yaml

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tests: samples: convert testcase files to yaml This will prepare test cases and samples with metadata and information that will be consumed by the sanitycheck script which will be changed to parse YAML files instead of ini. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-04-05 11:11:22 +08:00
sample:
samples: remove more build_only tags Remove build_only and add harness type needed for the sample/test to allow running with sanitycheck and on devices once we have harness support. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-12 01:35:31 +08:00
name: Temperature Sensor
tests: samples: convert testcase files to yaml This will prepare test cases and samples with metadata and information that will be consumed by the sanitycheck script which will be changed to parse YAML files instead of ini. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-04-05 11:11:22 +08:00
tests:
samples: add test identifier Add unique identifier instead of just 'test' for samples. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-03-29 23:44:43 +08:00
sample.sensor.thermometer:
tests/samples: cleanup tags Remove redundant 'sample' tag and add something that matches the functionality and features being tested, demonstrated. Avoid short abbriviations and using full names for fs. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-16 03:28:35 +08:00
tags: sensors
samples: remove more build_only tags Remove build_only and add harness type needed for the sample/test to allow running with sanitycheck and on devices once we have harness support. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-12 01:35:31 +08:00
harness: sensor
arch/x86_64: New architecture added This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr. Only the basic architecture support needed to run 64 bit code is added; no drivers are added, though a low-level console exists and is wired to printk(). The support is built on top of a "X86 underkernel" layer, which can be built in isolation as a unit test on a Linux host. Limitations: + Right now the SDK lacks an x86_64 toolchain. The build will fall back to a host toolchain if it finds no cross compiler defined, which is tested to work on gcc 8.2.1 right now. + No x87/SSE/AVX usage is allowed. This is a stronger limitation than other architectures where the instructions work from one thread even if the context switch code doesn't support it. We are passing -no-sse to prevent gcc from automatically generating SSE instructions for non-floating-point purposes, which has the side effect of changing the ABI. Future work to handle the FPU registers will need to be combined with an "application" ABI distinct from the kernel one (or just to require USERSPACE). + Paging is enabled (it has to be in long mode), but is a 1:1 mapping of all memory. No MMU/USERSPACE support yet. + We are building with -mno-red-zone for stack size reasons, but this is a valuable optimization. Enabling it requires automatic stack switching, which requires a TSS, which means it has to happen after MMU support. + The OS runs in 64 bit mode, but for compatibility reasons is compiled to the 32 bit "X32" ABI. So while the full 64 bit registers and instruction set are available, C pointers are 32 bits long and Zephyr is constrained to run in the bottom 4G of memory. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-08-20 03:24:48 +08:00
arch_exclude: x86_64 # No floating point on x86_64 yet