2015-05-21 00:40:39 +08:00
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# Kconfig - general architecture configuration options
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#
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# Copyright (c) 2014-2015 Wind River Systems, Inc.
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# Copyright (c) 2015 Intel Corporation
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2017-01-13 19:14:33 +08:00
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# Copyright (c) 2016 Cadence Design Systems, Inc.
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2015-05-21 00:40:39 +08:00
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#
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2017-01-19 09:01:01 +08:00
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# SPDX-License-Identifier: Apache-2.0
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2015-05-21 00:40:39 +08:00
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#
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2015-10-09 18:20:52 +08:00
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choice
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prompt "Architecture"
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default X86
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config ARC
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bool "ARC architecture"
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config ARM
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bool "ARM architecture"
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config X86
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bool "x86 architecture"
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2016-07-16 04:15:00 +08:00
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select ATOMIC_OPERATIONS_BUILTIN
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2015-10-09 18:20:52 +08:00
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2016-04-22 05:47:09 +08:00
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config NIOS2
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bool "Nios II Gen 2 architecture"
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2016-07-16 04:15:00 +08:00
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select ATOMIC_OPERATIONS_C
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2016-04-22 05:47:09 +08:00
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arch: added support for the riscv32 architecture
RISC-V is an open-source instruction set architecture.
Added support for the 32bit version of RISC-V to Zephyr.
1) exceptions/interrupts/faults are handled at the architecture
level via the __irq_wrapper handler. Context saving/restoring
of registers can be handled at both architecture and SOC levels.
If SOC-specific registers need to be saved, SOC level needs to
provide __soc_save_context and __soc_restore_context functions
that shall be accounted by the architecture level, when
corresponding config variable RISCV_SOC_CONTEXT_SAVE is set.
2) As RISC-V architecture does not provide a clear ISA specification
about interrupt handling, each RISC-V SOC handles it in its own
way. Hence, at the architecture level, the __irq_wrapper handler
expects the following functions to be provided by the SOC level:
__soc_is_irq: to check if the exception is the result of an
interrupt or not.
__soc_handle_irq: handle pending IRQ at SOC level (ex: clear
pending IRQ in SOC-specific IRQ register)
3) Thread/task scheduling, as well as IRQ offloading are handled via
the RISC-V system call ("ecall"), which is also handled via the
__irq_wrapper handler. The _Swap asm function just calls "ecall"
to generate an exception.
4) As there is no conventional way of handling CPU power save in
RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle
functions just unlock interrupts and return to the caller, without
issuing any CPU power saving instruction. Nonetheless, to allow
SOC-level to implement proper CPU power save, nano_cpu_idle and
nano_cpu_atomic_idle functions are defined as __weak
at the architecture level.
Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-11 07:24:30 +08:00
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config RISCV32
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bool "RISCV32 architecture"
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2017-01-13 19:14:33 +08:00
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config XTENSA
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bool "Xtensa architecture"
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2015-10-09 18:20:52 +08:00
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endchoice
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2017-09-09 09:14:06 +08:00
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menu "General Architecture Options"
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config HW_STACK_PROTECTION
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bool "Hardware Stack Protection"
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depends on ARCH_HAS_STACK_PROTECTION
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help
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Select this option to enable hardware stack protection.
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2017-09-09 20:40:43 +08:00
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config SIMPLE_FATAL_ERROR_HANDLER
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prompt "Simple system fatal error handler"
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bool
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default n
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default y if !MULTITHREADING
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help
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Provides an implementation of _SysFatalErrorHandler() that hard hangs
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instead of aborting the faulting thread, and does not print anything,
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for footprint-concerned systems. Only enable this option if you do not
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want debug capabilities in case of system fatal error.
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2017-09-09 20:39:38 +08:00
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menu "Interrupt Configuration"
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#
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# Interrupt related configs
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#
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config GEN_ISR_TABLES
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bool
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prompt "Use generated IRQ tables"
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default n
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help
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This option controls whether a platform uses the gen_isr_tables
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script to generate its interrupt tables. This mechanism will create
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an appropriate hardware vector table and/or software IRQ table.
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config GEN_IRQ_VECTOR_TABLE
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bool
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prompt "Generate an interrupt vector table"
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default y
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depends on GEN_ISR_TABLES
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help
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This option controls whether a platform using gen_isr_tables
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needs an interrupt vector table created. Only disable this if the
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platform does not use a vector table at all, or requires the vector
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table to be in a format that is not an array of function pointers
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indexed by IRQ line. In the latter case, the vector table must be
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supplied by the application or architecture code.
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config GEN_SW_ISR_TABLE
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bool
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prompt "Generate a software ISR table"
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default y
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depends on GEN_ISR_TABLES
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help
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This option controls whether a platform using gen_isr_tables
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needs a software ISR table table created. This is an array of struct
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_isr_table_entry containing the interrupt service routine and supplied
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parameter.
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config GEN_IRQ_START_VECTOR
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int
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default 0
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depends on GEN_ISR_TABLES
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help
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On some architectures, part of the vector table may be reserved for
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system exceptions and is declared separately from the tables
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created by gen_isr_tables.py. When creating these tables, this value
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will be subtracted from CONFIG_NUM_IRQS to properly size them.
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This is a hidden option which needs to be set per architecture and
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left alone.
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endmenu # Interrupt configuration
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2017-09-09 09:14:06 +08:00
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endmenu
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2017-09-09 20:39:38 +08:00
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#
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# Architecture Capabilities
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#
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2017-09-09 09:14:06 +08:00
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config ARCH_HAS_STACK_PROTECTION
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bool
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2016-03-19 07:43:40 +08:00
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#
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# Hidden PM feature configs which are to be selected by
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# individual SoC.
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#
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config SYS_POWER_LOW_POWER_STATE_SUPPORTED
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# Hidden
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2016-05-25 07:17:13 +08:00
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bool
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default n
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help
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This option signifies that the target supports the SYS_POWER_LOW_POWER_STATE
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configuration option.
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2016-03-19 07:43:40 +08:00
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config SYS_POWER_DEEP_SLEEP_SUPPORTED
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# Hidden
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2016-05-25 07:17:13 +08:00
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bool
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default n
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help
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This option signifies that the target supports the SYS_POWER_DEEP_SLEEP
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configuration option.
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2016-11-10 15:16:27 +08:00
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config BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
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# Hidden
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bool
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default n
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help
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This option signifies that the target has options of bootloaders
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that support context restore upon resume from deep sleep
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2016-03-19 07:43:40 +08:00
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#
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# End hidden PM feature configs
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#
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2015-10-09 18:20:52 +08:00
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config ARCH
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string
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help
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System architecture string.
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config SOC
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2016-03-31 20:07:42 +08:00
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string
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help
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SoC name which can be found under arch/<arch>/soc/<soc name>.
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This option holds the directory name used by the build system to locate
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the correct linker and header files for the SoC. This option will go away
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once all SoCs are using family/series structure.
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config SOC_SERIES
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string
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help
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SoC series name which can be found under arch/<arch>/soc/<family>/<series>.
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This option holds the directory name used by the build system to locate
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the correct linker and header files.
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config SOC_FAMILY
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string
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help
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SoC family name which can be found under arch/<arch>/soc/<family>.
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This option holds the directory name used by the build system to locate
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the correct linker and header files.
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2015-11-30 08:47:21 +08:00
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2015-12-08 09:20:25 +08:00
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config BOARD
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string
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help
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2017-04-25 02:30:10 +08:00
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This option holds the name of the board and is used to locate the files
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2016-03-31 20:07:42 +08:00
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related to the board in the source tree (under boards/).
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2016-05-05 04:13:56 +08:00
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The Board is the first location where we search for a linker.ld file,
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2016-03-31 20:07:42 +08:00
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if not found we look for the linker file in
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arch/<arch>/soc/<family>/<series>
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2015-12-08 09:20:25 +08:00
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2017-02-09 09:16:29 +08:00
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2015-10-09 18:20:52 +08:00
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source "arch/*/Kconfig"
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2015-12-13 18:54:28 +08:00
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source "boards/Kconfig"
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