2020-03-20 08:17:31 +08:00
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/*
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* Copyright (c) 2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include <crypto/cipher.h>
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#include <logging/log.h>
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#include <hal/nrf_ecb.h>
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2020-12-21 20:09:05 +08:00
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#define DT_DRV_COMPAT nordic_nrf_ecb
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2020-03-20 08:17:31 +08:00
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#define ECB_AES_KEY_SIZE 16
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#define ECB_AES_BLOCK_SIZE 16
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LOG_MODULE_REGISTER(crypto_nrf_ecb, CONFIG_CRYPTO_LOG_LEVEL);
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struct ecb_data {
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2020-05-28 00:26:57 +08:00
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uint8_t key[ECB_AES_KEY_SIZE];
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uint8_t cleartext[ECB_AES_BLOCK_SIZE];
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uint8_t ciphertext[ECB_AES_BLOCK_SIZE];
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2020-03-20 08:17:31 +08:00
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};
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struct nrf_ecb_drv_state {
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struct ecb_data data;
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bool in_use;
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};
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static struct nrf_ecb_drv_state drv_state;
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static int do_ecb_encrypt(struct cipher_ctx *ctx, struct cipher_pkt *pkt)
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{
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ARG_UNUSED(ctx);
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if (pkt->in_len != ECB_AES_BLOCK_SIZE) {
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LOG_ERR("only 16-byte blocks are supported");
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return -EINVAL;
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}
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if (pkt->out_buf_max < pkt->in_len) {
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LOG_ERR("output buffer too small");
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return -EINVAL;
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}
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if (pkt->in_buf != drv_state.data.cleartext) {
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memcpy(drv_state.data.cleartext, pkt->in_buf,
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ECB_AES_BLOCK_SIZE);
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}
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nrf_ecb_event_clear(NRF_ECB, NRF_ECB_EVENT_ENDECB);
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nrf_ecb_event_clear(NRF_ECB, NRF_ECB_EVENT_ERRORECB);
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nrf_ecb_task_trigger(NRF_ECB, NRF_ECB_TASK_STARTECB);
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while (!(nrf_ecb_event_check(NRF_ECB, NRF_ECB_EVENT_ENDECB) ||
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nrf_ecb_event_check(NRF_ECB, NRF_ECB_EVENT_ERRORECB))) {
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}
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if (nrf_ecb_event_check(NRF_ECB, NRF_ECB_EVENT_ERRORECB)) {
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LOG_ERR("ECB operation error");
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return -EIO;
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}
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if (pkt->out_buf != drv_state.data.ciphertext) {
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memcpy(pkt->out_buf, drv_state.data.ciphertext,
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ECB_AES_BLOCK_SIZE);
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}
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pkt->out_len = pkt->in_len;
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return 0;
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}
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2020-05-01 02:33:38 +08:00
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static int nrf_ecb_driver_init(const struct device *dev)
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2020-03-20 08:17:31 +08:00
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{
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ARG_UNUSED(dev);
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nrf_ecb_data_pointer_set(NRF_ECB, &drv_state.data);
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drv_state.in_use = false;
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return 0;
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}
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2020-05-01 02:33:38 +08:00
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static int nrf_ecb_query_caps(const struct device *dev)
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2020-03-20 08:17:31 +08:00
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{
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ARG_UNUSED(dev);
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return (CAP_RAW_KEY | CAP_SEPARATE_IO_BUFS | CAP_SYNC_OPS);
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}
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2020-05-01 02:33:38 +08:00
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static int nrf_ecb_session_setup(const struct device *dev,
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struct cipher_ctx *ctx,
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2020-03-20 08:17:31 +08:00
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enum cipher_algo algo, enum cipher_mode mode,
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enum cipher_op op_type)
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{
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ARG_UNUSED(dev);
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if ((algo != CRYPTO_CIPHER_ALGO_AES) ||
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!(ctx->flags & CAP_SYNC_OPS) ||
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(ctx->keylen != ECB_AES_KEY_SIZE) ||
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(op_type != CRYPTO_CIPHER_OP_ENCRYPT) ||
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(mode != CRYPTO_CIPHER_MODE_ECB)) {
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LOG_ERR("This driver only supports 128-bit AES ECB encryption"
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" in synchronous mode");
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return -EINVAL;
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}
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if (ctx->key.bit_stream == NULL) {
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LOG_ERR("No key provided");
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return -EINVAL;
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}
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if (drv_state.in_use) {
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LOG_ERR("Peripheral in use");
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return -EBUSY;
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}
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drv_state.in_use = true;
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ctx->ops.block_crypt_hndlr = do_ecb_encrypt;
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ctx->ops.cipher_mode = mode;
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if (ctx->key.bit_stream != drv_state.data.key) {
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memcpy(drv_state.data.key, ctx->key.bit_stream,
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ECB_AES_KEY_SIZE);
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}
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return 0;
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}
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2020-05-01 02:33:38 +08:00
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static int nrf_ecb_session_free(const struct device *dev,
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struct cipher_ctx *sessn)
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2020-03-20 08:17:31 +08:00
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(sessn);
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drv_state.in_use = false;
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return 0;
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}
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static const struct crypto_driver_api crypto_enc_funcs = {
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.begin_session = nrf_ecb_session_setup,
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.free_session = nrf_ecb_session_free,
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.crypto_async_callback_set = NULL,
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.query_hw_caps = nrf_ecb_query_caps,
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};
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2021-04-28 16:24:51 +08:00
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DEVICE_DT_INST_DEFINE(0, nrf_ecb_driver_init, NULL,
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2020-12-21 20:09:05 +08:00
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NULL, NULL,
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POST_KERNEL, CONFIG_CRYPTO_INIT_PRIORITY,
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&crypto_enc_funcs);
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