35 lines
988 B
C
35 lines
988 B
C
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/*
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <systemview/SEGGER_SYSVIEW.h>
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#include "SEGGER_SYSVIEW_Zephyr.h"
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static void _cbSendSystemDesc(void)
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{
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SEGGER_SYSVIEW_SendSysDesc("N=ZephyrSysView");
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SEGGER_SYSVIEW_SendSysDesc("D=" CONFIG_BOARD " "
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CONFIG_SOC_SERIES " " CONFIG_ARCH);
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SEGGER_SYSVIEW_SendSysDesc("O=Zephyr");
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}
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void SEGGER_SYSVIEW_Conf(void)
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{
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SEGGER_SYSVIEW_Init(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
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&SYSVIEW_X_OS_TraceAPI, _cbSendSystemDesc);
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#if defined(CONFIG_PHYS_RAM_ADDR) /* x86 */
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SEGGER_SYSVIEW_SetRAMBase(CONFIG_PHYS_RAM_ADDR);
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#elif defined(CONFIG_SRAM_BASE_ADDRESS) /* arm, default */
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SEGGER_SYSVIEW_SetRAMBase(CONFIG_SRAM_BASE_ADDRESS);
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#else
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/* Setting RAMBase is just an optimization: this value is subtracted
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* from all pointers in order to save bandwidth. It's not an error
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* if a platform does not set this value.
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*/
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#endif
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}
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