zephyr/soc/riscv/riscv-privilege/virt/Kconfig.series

# Copyright (c) 2020 Cobham Gaisler AB
# SPDX-License-Identifier: Apache-2.0

config SOC_SERIES_RISCV_VIRT
	bool "QEMU RISC-V VirtIO Board"
	select RISCV
	select SOC_FAMILY_RISCV_PRIVILEGE
soc/riscv: add the QEMU "RISC-V VirtIO board" The QEMU RISC-V VirtIO board is capable: - 8 x CPU - 256 MiB RAM - PMP - PCI - ISA string: RVnnIMAFDCSU - mul/div - FPU with double precision - MMU - Compressed instructions Devicetree was extracted from QEMU as described in virt.dtsi. The same .dtsi SOC description is used for 32-bit and 64-bit. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com> 2020-12-09 01:54:43 +08:00			`# Copyright (c) 2020 Cobham Gaisler AB`
			`# SPDX-License-Identifier: Apache-2.0`

			`config SOC_SERIES_RISCV_VIRT`
			`bool "QEMU RISC-V VirtIO Board"`
			`select RISCV`
			`select SOC_FAMILY_RISCV_PRIVILEGE`