2018-11-08 02:13:52 +08:00
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/*
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* Copyright (c) 2016 Freescale Semiconductor, Inc.
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* Copyright (c) 2018 Foundries.io
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <device.h>
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#include <pinmux.h>
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#include <fsl_common.h>
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#include <fsl_clock.h>
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struct pinmux_rv32m1_config {
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clock_ip_name_t clock_ip_name;
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PORT_Type *base;
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};
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static int pinmux_rv32m1_set(struct device *dev, u32_t pin, u32_t func)
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{
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const struct pinmux_rv32m1_config *config = dev->config->config_info;
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PORT_Type *base = config->base;
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base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_MUX_MASK) | func;
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return 0;
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}
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static int pinmux_rv32m1_get(struct device *dev, u32_t pin, u32_t *func)
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{
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const struct pinmux_rv32m1_config *config = dev->config->config_info;
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PORT_Type *base = config->base;
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*func = base->PCR[pin] & ~PORT_PCR_MUX_MASK;
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return 0;
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}
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static int pinmux_rv32m1_pullup(struct device *dev, u32_t pin, u8_t func)
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{
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return -ENOTSUP;
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}
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static int pinmux_rv32m1_input(struct device *dev, u32_t pin, u8_t func)
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{
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return -ENOTSUP;
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}
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static int pinmux_rv32m1_init(struct device *dev)
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{
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const struct pinmux_rv32m1_config *config = dev->config->config_info;
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CLOCK_EnableClock(config->clock_ip_name);
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return 0;
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}
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static const struct pinmux_driver_api pinmux_rv32m1_driver_api = {
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.set = pinmux_rv32m1_set,
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.get = pinmux_rv32m1_get,
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.pullup = pinmux_rv32m1_pullup,
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.input = pinmux_rv32m1_input,
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};
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#ifdef CONFIG_PINMUX_RV32M1_PORTA
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static const struct pinmux_rv32m1_config pinmux_rv32m1_porta_config = {
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2019-03-05 02:27:37 +08:00
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.base = (PORT_Type *)DT_OPENISA_RV32M1_PINMUX_PINMUX_A_BASE_ADDRESS,
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2018-11-08 02:13:52 +08:00
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.clock_ip_name = kCLOCK_PortA,
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};
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DEVICE_AND_API_INIT(pinmux_porta, CONFIG_PINMUX_RV32M1_PORTA_NAME,
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&pinmux_rv32m1_init,
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NULL, &pinmux_rv32m1_porta_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
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&pinmux_rv32m1_driver_api);
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#endif
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#ifdef CONFIG_PINMUX_RV32M1_PORTB
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static const struct pinmux_rv32m1_config pinmux_rv32m1_portb_config = {
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2019-03-05 02:27:37 +08:00
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.base = (PORT_Type *)DT_OPENISA_RV32M1_PINMUX_PINMUX_B_BASE_ADDRESS,
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2018-11-08 02:13:52 +08:00
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.clock_ip_name = kCLOCK_PortB,
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};
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DEVICE_AND_API_INIT(pinmux_portb, CONFIG_PINMUX_RV32M1_PORTB_NAME,
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&pinmux_rv32m1_init,
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NULL, &pinmux_rv32m1_portb_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
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&pinmux_rv32m1_driver_api);
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#endif
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#ifdef CONFIG_PINMUX_RV32M1_PORTC
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static const struct pinmux_rv32m1_config pinmux_rv32m1_portc_config = {
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2019-03-05 02:27:37 +08:00
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.base = (PORT_Type *)DT_OPENISA_RV32M1_PINMUX_PINMUX_C_BASE_ADDRESS,
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2018-11-08 02:13:52 +08:00
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.clock_ip_name = kCLOCK_PortC,
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};
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DEVICE_AND_API_INIT(pinmux_portc, CONFIG_PINMUX_RV32M1_PORTC_NAME,
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&pinmux_rv32m1_init,
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NULL, &pinmux_rv32m1_portc_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
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&pinmux_rv32m1_driver_api);
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#endif
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#ifdef CONFIG_PINMUX_RV32M1_PORTD
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static const struct pinmux_rv32m1_config pinmux_rv32m1_portd_config = {
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2019-03-05 02:27:37 +08:00
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.base = (PORT_Type *)DT_OPENISA_RV32M1_PINMUX_PINMUX_D_BASE_ADDRESS,
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2018-11-08 02:13:52 +08:00
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.clock_ip_name = kCLOCK_PortD,
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};
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DEVICE_AND_API_INIT(pinmux_portd, CONFIG_PINMUX_RV32M1_PORTD_NAME,
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&pinmux_rv32m1_init,
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NULL, &pinmux_rv32m1_portd_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
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&pinmux_rv32m1_driver_api);
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#endif
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#ifdef CONFIG_PINMUX_RV32M1_PORTE
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static const struct pinmux_rv32m1_config pinmux_rv32m1_porte_config = {
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2019-03-05 02:27:37 +08:00
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.base = (PORT_Type *)DT_OPENISA_RV32M1_PINMUX_PINMUX_E_BASE_ADDRESS,
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2018-11-08 02:13:52 +08:00
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.clock_ip_name = kCLOCK_PortE,
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};
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DEVICE_AND_API_INIT(pinmux_porte, CONFIG_PINMUX_RV32M1_PORTE_NAME,
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&pinmux_rv32m1_init,
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NULL, &pinmux_rv32m1_porte_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
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&pinmux_rv32m1_driver_api);
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#endif
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