zephyr/dts/arm/gd/gd32f4xx/gd32f405.dtsi

/*
 * Copyright (c) 2021, BrainCo Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <gd/gd32f4xx/gd32f4xx.dtsi>

&cpu0 {
	clock-frequency = <168000000>;
};
dts: arm: gigadevice: support gd32f405xx soc Add support for GD32F405xx series SOCs. Signed-off-by: HaiLong Yang <cameledyang@pm.me> 2021-11-17 13:59:24 +08:00			`/*`
			`* Copyright (c) 2021, BrainCo Inc.`
			`*`
			`* SPDX-License-Identifier: Apache-2.0`
			`*/`

dts: arm/riscv: gigadevice: s/gigadevice/gd To stay consistent with other vendors, use vendor prefix (gd). Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> 2024-01-09 16:50:44 +08:00			`#include <gd/gd32f4xx/gd32f4xx.dtsi>`
dts: arm: gigadevice: support gd32f405xx soc Add support for GD32F405xx series SOCs. Signed-off-by: HaiLong Yang <cameledyang@pm.me> 2021-11-17 13:59:24 +08:00
			`&cpu0 {`
			`clock-frequency = <168000000>;`
			`};`