2017-02-09 09:16:29 +08:00
|
|
|
/*
|
|
|
|
* Copyright (c) 2017 Intel Corporation
|
|
|
|
*
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* This creates a special section which is not included by the final binary,
|
|
|
|
* instead it is consumed by the gen_isr_tables.py script.
|
|
|
|
*
|
|
|
|
* What we create here is a data structure:
|
|
|
|
*
|
|
|
|
* struct {
|
2017-04-21 23:55:34 +08:00
|
|
|
* u32_t num_isrs;
|
|
|
|
* u32_t num_vectors;
|
2017-02-09 09:16:29 +08:00
|
|
|
* struct _isr_list isrs[]; <- of size num_isrs
|
|
|
|
* }
|
|
|
|
*
|
2018-05-09 18:00:24 +08:00
|
|
|
* Which indicates the memory address of the number of isrs that were
|
|
|
|
* defined, the total number of IRQ lines in the system, followed by
|
|
|
|
* an appropriate number of instances of struct _isr_list. See
|
|
|
|
* include/sw_isr_table.h
|
2017-02-09 09:16:29 +08:00
|
|
|
*
|
|
|
|
* You will need to declare a bogus memory region for IDT_LIST. It doesn't
|
|
|
|
* matter where this region goes as it is stripped from the final ELF image.
|
|
|
|
* The address doesn't even have to be valid on the target. However, it
|
|
|
|
* shouldn't overlap any other regions. On most arches the following should be
|
|
|
|
* fine:
|
|
|
|
*
|
|
|
|
* MEMORY {
|
|
|
|
* .. other regions ..
|
|
|
|
* IDT_LIST : ORIGIN = 0xfffff7ff, LENGTH = 2K
|
|
|
|
* }
|
|
|
|
*/
|
|
|
|
|
2017-05-13 04:27:50 +08:00
|
|
|
#ifndef LINKER_PASS2
|
2017-02-09 09:16:29 +08:00
|
|
|
SECTION_PROLOGUE(.intList,,)
|
|
|
|
{
|
2017-02-14 01:56:25 +08:00
|
|
|
KEEP(*(.irq_info))
|
2017-02-09 09:16:29 +08:00
|
|
|
LONG((__INT_LIST_END__ - __INT_LIST_START__) / __ISR_LIST_SIZEOF)
|
|
|
|
__INT_LIST_START__ = .;
|
|
|
|
KEEP(*(.intList))
|
|
|
|
__INT_LIST_END__ = .;
|
|
|
|
} GROUP_LINK_IN(IDT_LIST)
|
2017-05-13 04:27:50 +08:00
|
|
|
#else
|
|
|
|
/DISCARD/ :
|
|
|
|
{
|
|
|
|
KEEP(*(.irq_info))
|
|
|
|
KEEP(*(.intList))
|
|
|
|
}
|
|
|
|
#endif
|