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zephyr/boards/silabs/efr32mg_sltb004a/efr32mg_sltb004a_defconfig

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license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 21:08:09 +08:00
# SPDX-License-Identifier: Apache-2.0
soc: silabs_exx32: Enable mpu on efr32mg soc Enables the arm v7m mpu on the efr32mg soc and the board efr32mg_sltb004a. Tested on hardware with samples/mpu/mpu_test and tests/kernel/mem_protect Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2019-11-05 23:46:34 +08:00
CONFIG_ARM_MPU=y
boards: Add Silabs EFR32MG-SLTB004A (Thunderboard Sense 2) support The EFR32™ Mighty Gecko Starter Kit EFR32MG-SLTB004A (a.k.a Thunderboard Sense 2) contains a MCU from the EFR32MG12P family built on ARM® Cortex®-M4F processor with low power capabilities. There is an On-Board J-Link Debugger that presents a virtual COM port for general purpose application serial data transfer with this interface and a Mass Storage for firmware flashing. Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-10-31 04:56:31 +08:00
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=38400000
boards/efr32mg_sltb004a: use crystal instead of RC oscillator Selection of the HFRCO causes the SOC to stay at its power-up frequency of 19 MHz. Switch to the HFXO to use the configured frequency. Closes #17630 Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-13 04:27:30 +08:00
CONFIG_CMU_HFCLK_HFXO=y
arm: silabs: Enable DCDC before setting up clk This enables DCDC for Silabs devices before initializing the clock. Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
2018-11-08 20:48:12 +08:00
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y