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zephyr/boards/riscv32/qemu_riscv32/Makefile.board

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boards: added support for the qemu_riscv32 board The qemu_riscv32 board makes use of: 1) the uart_riscv_qemu driver 2) the riscv_qemu_timer driver Change-Id: I413e3990a66bc62a0d15d82ebca6940b381fed43 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-11 07:24:31 +08:00
EMU_PLATFORM = qemu
QEMU_CPU_TYPE_riscv32 = riscv32
riscv32: added a generic linker script for the riscv32 platform Added a linker script that shall be common to most riscv SOCs. Linker script also accounts for execution in place in ROM, when CONFIG_XIP is set. Nonetheless, riscv32 SOCs (like pulpino) requiring a different system layout can still define their own linker script. Change-Id: I3ad670446d439772c29a8204e307ac79643dc650 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-02-01 09:25:26 +08:00
QEMU_FLAGS_riscv32 = -machine sifive -nographic -m $(CONFIG_RISCV_RAM_SIZE_MB)
boards: added support for the qemu_riscv32 board The qemu_riscv32 board makes use of: 1) the uart_riscv_qemu driver 2) the riscv_qemu_timer driver Change-Id: I413e3990a66bc62a0d15d82ebca6940b381fed43 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-11 07:24:31 +08:00
QEMU_riscv32 = qemu-system-riscv32
DEBUG_SCRIPT = qemu.sh
debugserver: QEMU_EXTRA_FLAGS += -s -S
qemu: cleanup qemu configurations Move all QEMU related defines to the boards and cleanup xtensa platforms which were marked to be QEMU capable by mistake. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-23 08:41:06 +08:00
debugserver: run