70 lines
1.5 KiB
C
70 lines
1.5 KiB
C
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/*
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* Copyright (c) 2018 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _SPINLOCK_H
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#define _SPINLOCK_H
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#include <atomic.h>
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struct k_spinlock_key {
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int key;
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};
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typedef struct k_spinlock_key k_spinlock_key_t;
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struct k_spinlock {
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#ifdef CONFIG_SMP
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atomic_t locked;
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#ifdef CONFIG_DEBUG
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int saved_key;
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#endif
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#endif
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};
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static inline k_spinlock_key_t k_spin_lock(struct k_spinlock *l)
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{
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k_spinlock_key_t k;
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/* Note that we need to use the underlying arch-specific lock
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* implementation. The "irq_lock()" API in SMP context is
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* actually a wrapper for a global spinlock!
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*/
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k.key = _arch_irq_lock();
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#ifdef CONFIG_SMP
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# ifdef CONFIG_DEBUG
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l->saved_key = k.key;
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# endif
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while (!atomic_cas(&l->locked, 0, 1)) {
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}
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#endif
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return k;
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}
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static inline void k_spin_unlock(struct k_spinlock *l, k_spinlock_key_t key)
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{
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#ifdef CONFIG_SMP
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# ifdef CONFIG_DEBUG
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/* This doesn't attempt to catch all mismatches, just spots
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* where the arch state register shows a difference. Should
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* add a nesting count or something...
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*/
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__ASSERT(l->saved_key == key.key, "Mismatched spin lock/unlock");
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# endif
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/* Strictly we don't need atomic_clear() here (which is an
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* exchange operation that returns the old value). We are always
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* setting a zero and (because we hold the lock) know the existing
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* state won't change due to a race. But some architectures need
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* a memory barrier when used like this, and we don't have a
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* Zephyr framework for that.
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*/
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atomic_clear(&l->locked);
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#endif
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_arch_irq_unlock(key.key);
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}
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#endif /* _SPINLOCK_H */
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