2019-11-01 20:45:29 +08:00
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# XTENSA board configuration
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2017-01-13 19:14:33 +08:00
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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# Copyright (c) 2016 Cadence Design Systems, Inc.
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2017-01-25 07:10:39 +08:00
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# SPDX-License-Identifier: Apache-2.0
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2017-01-13 19:14:33 +08:00
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2017-05-12 05:46:49 +08:00
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if SOC_XTENSA_SAMPLE_CONTROLLER
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2017-04-12 06:10:00 +08:00
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config SOC
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2018-05-26 03:19:21 +08:00
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default "sample_controller"
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2017-01-13 19:14:33 +08:00
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config IRQ_OFFLOAD_INTNUM
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default 7
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2019-03-04 09:16:08 +08:00
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config LOG_BACKEND_XTENSA_SIM
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default LOG
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2017-01-13 19:14:33 +08:00
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endif
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