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zephyr/soc/riscv/riscv-privilege/miv/Kconfig.soc

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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 20:45:29 +08:00
# RISCV32_MIV configuration options
license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 21:08:09 +08:00
riscv32: riscv-privilege: Microsemi Mi-V support This commit adds support for Microsemi Mi-V RISC-V softcore CPU running on the M2GL025 IGLOO2 FPGA development board. signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-11 01:02:14 +08:00
# Copyright (c) 2018 Antmicro <www.antmicro.com>
kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 20:45:29 +08:00
# SPDX-License-Identifier: Apache-2.0
riscv32: riscv-privilege: Microsemi Mi-V support This commit adds support for Microsemi Mi-V RISC-V softcore CPU running on the M2GL025 IGLOO2 FPGA development board. signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-11 01:02:14 +08:00
choice
kconfig: Global whitespace/consistency cleanup Clean up space errors and use a consistent style throughout the Kconfig files. This makes reading the Kconfig files more distraction-free, helps with grepping, and encourages the same style getting copied around everywhere (meaning another pass hopefully won't be needed). Go for the most common style: - Indent properties with a single tab, including for choices. Properties on choices work exactly the same syntactically as properties on symbols, so not sure how the no-indentation thing happened. - Indent help texts with a tab followed by two spaces - Put a space between 'config' and the symbol name, not a tab. This also helps when grepping for definitions. - Do '# A comment' instead of '#A comment' I tweaked Kconfiglib a bit to find most of the stuff. Some help texts were reflowed to 79 columns with 'gq' in Vim as well, though not all, because I was afraid I'd accidentally mess up formatting. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 17:24:07 +08:00
prompt "Microsemi Mi-V system implementation"
depends on SOC_SERIES_RISCV32_MIV
riscv32: riscv-privilege: Microsemi Mi-V support This commit adds support for Microsemi Mi-V RISC-V softcore CPU running on the M2GL025 IGLOO2 FPGA development board. signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-11 01:02:14 +08:00
config SOC_RISCV32_MIV
bool "Microsemi Mi-V system implementation"
select ATOMIC_OPERATIONS_C
endchoice