zephyr/drivers/interrupt_controller/plic.h

/*
 * Copyright (c) 2018 Antmicro <www.antmicro.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_PLIC_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_PLIC_H_

#include <soc.h>

#define PLIC_IRQS        (CONFIG_NUM_IRQS - RISCV_MAX_GENERIC_IRQ)
#define PLIC_EN_SIZE     ((PLIC_IRQS >> 5) + 1)

#endif
riscv32: riscv-privilege: integrate common code This commit moves code from fe310 platform into RISC-V privilege common folder. This way the code can be reused by other platforms in future. signed-off-by: Karol Gugala <kgugala@antmicro.com> 2018-06-11 01:02:14 +08:00			`/*`
			`* Copyright (c) 2018 Antmicro <www.antmicro.com>`
			`*`
			`* SPDX-License-Identifier: Apache-2.0`
			`*/`

headers: Fix headers across the project Any word started with underscore followed by and uppercase letter or a second underscore is a reserved word according with C99. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> 2018-09-15 01:43:44 +08:00			`#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_PLIC_H_`
			`#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_PLIC_H_`
riscv32: riscv-privilege: integrate common code This commit moves code from fe310 platform into RISC-V privilege common folder. This way the code can be reused by other platforms in future. signed-off-by: Karol Gugala <kgugala@antmicro.com> 2018-06-11 01:02:14 +08:00
			`#include <soc.h>`

			`#define PLIC_IRQS (CONFIG_NUM_IRQS - RISCV_MAX_GENERIC_IRQ)`
			`#define PLIC_EN_SIZE ((PLIC_IRQS >> 5) + 1)`

			`#endif`