2016-09-08 17:54:21 +08:00
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/*
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* Copyright (c) 2016 Linaro Limited
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*
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2017-01-19 09:01:01 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2016-09-08 17:54:21 +08:00
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*/
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#include <device.h>
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#include <init.h>
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2016-12-05 04:59:37 +08:00
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#include <kernel.h>
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2016-09-08 17:54:21 +08:00
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#include <pinmux.h>
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#include <soc.h>
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#include <sys_io.h>
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#include <gpio/gpio_cmsdk_ahb.h>
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#include "pinmux/pinmux.h"
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/**
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* @brief Pinmux driver for ARM V2M Beetle Board
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*
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* The ARM V2M Beetle Board has 4 GPIO controllers. These controllers
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* are responsible for pin muxing, input/output, pull-up, etc.
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*
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* The GPIO controllers 2 and 3 are reserved and therefore not exposed by
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* this driver.
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*
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* All GPIO controller exposed pins are exposed via the following sequence of
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* pin numbers:
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* Pins 0 - 15 are for GPIO0
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* Pins 16 - 31 are for GPIO1
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*
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* For the exposed GPIO controllers ARM V2M Beetle Board follows the Arduino
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* compliant pin out.
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*/
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#define CMSDK_AHB_GPIO0_DEV \
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((volatile struct gpio_cmsdk_ahb *)CMSDK_AHB_GPIO0)
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#define CMSDK_AHB_GPIO1_DEV \
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((volatile struct gpio_cmsdk_ahb *)CMSDK_AHB_GPIO1)
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/*
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* This is the mapping from the ARM V2M Beetle Board pins to GPIO
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* controllers.
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*
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* D0 : P0_0
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* D1 : P0_1
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* D2 : P0_2
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* D3 : P0_3
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* D4 : P0_4
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* D5 : P0_5
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* D6 : P0_6
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* D7 : P0_7
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* D8 : P0_8
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* D9 : P0_9
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* D10 : P0_10
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* D11 : P0_11
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* D12 : P0_12
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* D13 : P0_13
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* D14 : P0_14
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* D15 : P0_15
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* D16 : P1_0
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* D17 : P1_1
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* D18 : P1_2
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* D19 : P1_3
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* D20 : P1_4
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* D21 : P1_5
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* D22 : P1_6
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* D23 : P1_7
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* D24 : P1_8
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* D25 : P1_9
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* D26 : P1_10
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* D27 : P1_11
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* D28 : P1_12
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* D29 : P1_13
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* D30 : P1_14
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* D31 : P1_15
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*
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* UART_0_RX : D0
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* UART_0_TX : D1
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* SPI_0_CS : D10
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* SPI_0_MOSI : D11
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* SPI_0_MISO : D12
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* SPI_0_SCLK : D13
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* I2C_0_SCL : D14
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* I2C_0_SDA : D15
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* UART_1_RX : D16
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* UART_1_TX : D17
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* SPI_1_CS : D18
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* SPI_1_MOSI : D19
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* SPI_1_MISO : D20
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* SPI_1_SCK : D21
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* I2C_1_SDA : D22
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* I2C_1_SCL : D23
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*
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*/
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static void arm_v2m_beetle_pinmux_defaults(void)
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{
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2017-04-21 23:03:20 +08:00
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u32_t gpio_0 = 0;
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u32_t gpio_1 = 0;
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2016-09-08 17:54:21 +08:00
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/* Set GPIO Alternate Functions */
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gpio_0 = (1<<0); /* Sheild 0 UART 0 RXD */
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gpio_0 |= (1<<1); /* Sheild 0 UART 0 TXD */
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gpio_0 |= (1<<14); /* Sheild 0 I2C SDA SBCON2 */
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gpio_0 |= (1<<15); /* Sheild 0 I2C SCL SBCON2 */
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gpio_0 |= (1<<10); /* Sheild 0 SPI_3 nCS */
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gpio_0 |= (1<<11); /* Sheild 0 SPI_3 MOSI */
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gpio_0 |= (1<<12); /* Sheild 0 SPI_3 MISO */
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gpio_0 |= (1<<13); /* Sheild 0 SPI_3 SCK */
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CMSDK_AHB_GPIO0_DEV->altfuncset = gpio_0;
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gpio_1 = (1<<0); /* UART 1 RXD */
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gpio_1 |= (1<<1); /* UART 1 TXD */
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gpio_1 |= (1<<6); /* Sheild 1 I2C SDA */
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gpio_1 |= (1<<7); /* Sheild 1 I2C SCL */
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gpio_1 |= (1<<2); /* ADC SPI_1 nCS */
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gpio_1 |= (1<<3); /* ADC SPI_1 MOSI */
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gpio_1 |= (1<<4); /* ADC SPI_1 MISO */
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gpio_1 |= (1<<5); /* ADC SPI_1 SCK */
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gpio_1 |= (1<<8); /* QSPI CS 2 */
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gpio_1 |= (1<<9); /* QSPI CS 1 */
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gpio_1 |= (1<<10); /* QSPI IO 0 */
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gpio_1 |= (1<<11); /* QSPI IO 1 */
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gpio_1 |= (1<<12); /* QSPI IO 2 */
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gpio_1 |= (1<<13); /* QSPI IO 3 */
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gpio_1 |= (1<<14); /* QSPI SCK */
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CMSDK_AHB_GPIO1_DEV->altfuncset = gpio_1;
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/* Set the ARD_PWR_EN GPIO1[15] as an output */
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CMSDK_AHB_GPIO1_DEV->outenableset |= (0x1 << 15);
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/* Set on 3v3 (for ARDUINO HDR compliancy) */
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CMSDK_AHB_GPIO1_DEV->data |= (0x1 << 15);
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}
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static int arm_v2m_beetle_pinmux_init(struct device *port)
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{
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ARG_UNUSED(port);
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arm_v2m_beetle_pinmux_defaults();
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return 0;
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}
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SYS_INIT(arm_v2m_beetle_pinmux_init, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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