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zephyr/soc/arm/fvp_aemv8a/mmu_regions.c

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board: arm64: Add FVP Base RevC 2xAEMv8A board Add support for the FVP Base RevC 2xAEMv8A board to be emulated using the same FVP. For now the virtual platform is only exposing one core and the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...). INFO - Total complete: 256/ 256 100% skipped: 933, failed: 0 Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-09 22:39:46 +08:00
/*
* Copyright 2021 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
soc: migrate includes to <zephyr/...> In order to bring consistency in-tree, migrate all soc code to the new prefix <zephyr/...>. Note that the conversion has been scripted, refer to zephyrproject-rtos#45388 for more details. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 17:11:04 +08:00
#include <zephyr/arch/arm64/arm_mmu.h>
soc: arm64: fvp_aemv8a: fix soc.h usage <soc.h> has been traditionally been used as a proxy to HAL headers, register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a different purpose depending on the SoC. In some cases it includes HALs, in some others it works as a header sink/proxy (for no good reason), as a register definition when there's no HAL... To make things worse, it is being included in code that is, in theory, non-SoC specific. This patch is part of a series intended to improve the situation by removing <soc.h> usage when not needed, and by eventually removing it. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-31 22:45:24 +08:00
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
board: arm64: Add FVP Base RevC 2xAEMv8A board Add support for the FVP Base RevC 2xAEMv8A board to be emulated using the same FVP. For now the virtual platform is only exposing one core and the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...). INFO - Total complete: 256/ 256 100% skipped: 933, failed: 0 Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-09 22:39:46 +08:00
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE),
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1),
DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1),
MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE),
};
const struct arm_mmu_config mmu_config = {
.num_regions = ARRAY_SIZE(mmu_regions),
.mmu_regions = mmu_regions,
};