2018-02-22 00:19:38 +08:00
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/* SoC level DTS fixup file */
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2017-06-16 23:42:05 +08:00
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define TI_STELLARIS_UART_4000C000_BASE_ADDRESS TI_STELLARIS_UART_40001000_BASE_ADDRESS
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#define TI_STELLARIS_UART_4000C000_CURRENT_SPEED TI_STELLARIS_UART_40001000_CURRENT_SPEED
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#define UART_STELLARIS_CLK_FREQ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
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#define TI_STELLARIS_UART_4000C000_IRQ_0 TI_STELLARIS_UART_40001000_IRQ_0
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#define TI_STELLARIS_UART_4000C000_IRQ_0_PRIORITY TI_STELLARIS_UART_40001000_IRQ_0_PRIORITY
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#define TI_STELLARIS_UART_4000C000_LABEL TI_STELLARIS_UART_40001000_LABEL
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2018-02-22 00:19:38 +08:00
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/* End of SoC Level DTS fixup file */
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