2022-10-12 15:37:52 +08:00
|
|
|
# Configuration for NXP S32 external interrupt controller
|
|
|
|
|
2024-07-19 13:06:10 +08:00
|
|
|
# Copyright 2022-2024 NXP
|
2022-10-12 15:37:52 +08:00
|
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
|
|
|
|
config NXP_S32_EIRQ
|
|
|
|
bool "External interrupt controller driver for NXP S32 MCUs"
|
|
|
|
default y
|
|
|
|
depends on DT_HAS_NXP_S32_SIUL2_EIRQ_ENABLED
|
2023-09-26 12:31:13 +08:00
|
|
|
select NOCACHE_MEMORY if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
|
2024-09-25 21:02:41 +08:00
|
|
|
select PINCTRL
|
2022-10-12 15:37:52 +08:00
|
|
|
help
|
|
|
|
External interrupt controller driver for NXP S32 MCUs
|
2023-09-11 14:35:59 +08:00
|
|
|
|
2024-07-18 18:59:49 +08:00
|
|
|
if NXP_S32_EIRQ
|
|
|
|
|
|
|
|
config NXP_S32_EIRQ_EXT_INTERRUPTS_MAX
|
|
|
|
int
|
|
|
|
default 8 if SOC_SERIES_S32ZE
|
|
|
|
default 32 if SOC_SERIES_S32K3
|
|
|
|
help
|
|
|
|
Number of SIUL2 external interrupts per controller. This is a SoC
|
|
|
|
integration option.
|
|
|
|
|
|
|
|
config NXP_S32_EIRQ_EXT_INTERRUPTS_GROUP
|
|
|
|
int
|
|
|
|
default 8
|
|
|
|
help
|
|
|
|
Number of SIUL2 external interrupts grouped into a single core
|
|
|
|
interrupt line. This is a SoC integration option.
|
|
|
|
|
|
|
|
endif # NXP_S32_EIRQ
|
|
|
|
|
2023-09-11 14:35:59 +08:00
|
|
|
config NXP_S32_WKPU
|
|
|
|
bool "Wake-up Unit interrupt controller driver for NXP S32 MCUs"
|
|
|
|
default y
|
|
|
|
depends on DT_HAS_NXP_S32_WKPU_ENABLED
|
|
|
|
help
|
|
|
|
Wake-up Unit interrupt controller driver for NXP S32 MCUs
|
2024-07-19 13:06:10 +08:00
|
|
|
|
|
|
|
if NXP_S32_WKPU
|
|
|
|
|
|
|
|
config NXP_S32_WKPU_SOURCES_MAX
|
|
|
|
int
|
|
|
|
range 32 64
|
|
|
|
default 64 if SOC_SERIES_S32K3
|
|
|
|
help
|
|
|
|
Number of WKPU external and internal sources per controller. This is
|
|
|
|
a SoC integration option.
|
|
|
|
|
|
|
|
endif # NXP_S32_WKPU
|