108 lines
2.0 KiB
Plaintext
108 lines
2.0 KiB
Plaintext
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/*
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* Copyright (c) 2022 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 20)>,
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<NRF_PSEL(UART_RX, 0, 19)>;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 20)>,
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<NRF_PSEL(UART_RX, 0, 19)>;
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low-power-enable;
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};
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};
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uart1_default: uart1_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 16)>,
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<NRF_PSEL(UART_RX, 0, 15)>;
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};
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};
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uart1_sleep: uart1_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 16)>,
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<NRF_PSEL(UART_RX, 0, 15)>;
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low-power-enable;
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};
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};
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i2c0_default: i2c0_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 13)>,
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<NRF_PSEL(TWIM_SCL, 0, 14)>;
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};
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};
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i2c0_sleep: i2c0_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 13)>,
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<NRF_PSEL(TWIM_SCL, 0, 14)>;
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low-power-enable;
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};
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};
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i2c1_default: i2c1_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 24)>,
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<NRF_PSEL(TWIM_SCL, 0, 25)>;
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};
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};
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i2c1_sleep: i2c1_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 24)>,
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<NRF_PSEL(TWIM_SCL, 0, 25)>;
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low-power-enable;
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};
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};
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spi1_default: spi1_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 11)>,
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<NRF_PSEL(SPIM_MOSI, 1, 12)>,
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<NRF_PSEL(SPIM_MISO, 1, 13)>;
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};
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};
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spi1_sleep: spi1_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 11)>,
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<NRF_PSEL(SPIM_MOSI, 1, 12)>,
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<NRF_PSEL(SPIM_MISO, 1, 13)>;
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low-power-enable;
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};
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};
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qspi_default: qspi_default {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 0, 3)>,
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<NRF_PSEL(QSPI_IO0, 0, 30)>,
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<NRF_PSEL(QSPI_IO1, 0, 29)>,
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<NRF_PSEL(QSPI_IO2, 0, 28)>,
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<NRF_PSEL(QSPI_IO3, 0, 2)>,
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<NRF_PSEL(QSPI_CSN, 0, 26)>;
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};
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};
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qspi_sleep: qspi_sleep {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 0, 3)>,
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<NRF_PSEL(QSPI_IO0, 0, 30)>,
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<NRF_PSEL(QSPI_IO1, 0, 29)>,
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<NRF_PSEL(QSPI_IO2, 0, 28)>,
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<NRF_PSEL(QSPI_IO3, 0, 2)>,
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<NRF_PSEL(QSPI_CSN, 0, 26)>;
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low-power-enable;
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};
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};
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};
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