87 lines
2.9 KiB
C
87 lines
2.9 KiB
C
/*******************************************************************************
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* File Name: cycfg_system.h
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*
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* Description:
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* System configuration
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* This file was automatically generated and should not be modified.
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* Device Configurator: 2.0.0.1483
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* Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837
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*
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********************************************************************************
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* Copyright 2017-2019 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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********************************************************************************/
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#if !defined(CYCFG_SYSTEM_H)
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#define CYCFG_SYSTEM_H
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#include "cy_sysclk.h"
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#include "cy_systick.h"
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#if defined (CY_USING_HAL)
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#include "cyhal_hwmgr.h"
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#endif //defined (CY_USING_HAL)
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#include "cy_gpio.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define cpuss_0_dap_0_ENABLED 1U
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#define srss_0_clock_0_ENABLED 1U
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#define srss_0_clock_0_altsystickclk_0_ENABLED 1U
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#define srss_0_clock_0_bakclk_0_ENABLED 1U
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#define srss_0_clock_0_fastclk_0_ENABLED 1U
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#define srss_0_clock_0_fll_0_ENABLED 1U
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#define srss_0_clock_0_hfclk_0_ENABLED 1U
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#define CY_CFG_SYSCLK_CLKHF0 0UL
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#define srss_0_clock_0_hfclk_2_ENABLED 1U
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#define CY_CFG_SYSCLK_CLKHF2 2UL
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#define srss_0_clock_0_hfclk_3_ENABLED 1U
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#define CY_CFG_SYSCLK_CLKHF3 3UL
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#define srss_0_clock_0_hfclk_4_ENABLED 1U
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#define CY_CFG_SYSCLK_CLKHF4 4UL
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#define srss_0_clock_0_ilo_0_ENABLED 1U
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#define srss_0_clock_0_imo_0_ENABLED 1U
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#define srss_0_clock_0_lfclk_0_ENABLED 1U
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#define CY_CFG_SYSCLK_CLKLF_FREQ_HZ 32768
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#define srss_0_clock_0_pathmux_0_ENABLED 1U
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#define srss_0_clock_0_pathmux_1_ENABLED 1U
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#define srss_0_clock_0_pathmux_2_ENABLED 1U
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#define srss_0_clock_0_periclk_0_ENABLED 1U
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#define srss_0_clock_0_pll_0_ENABLED 1U
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#define srss_0_clock_0_pll_1_ENABLED 1U
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#define srss_0_clock_0_slowclk_0_ENABLED 1U
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#define srss_0_clock_0_timerclk_0_ENABLED 1U
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#define srss_0_clock_0_wco_0_ENABLED 1U
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#if defined (CY_USING_HAL)
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extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj;
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#endif //defined (CY_USING_HAL)
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#if defined (CY_USING_HAL)
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extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj;
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#endif //defined (CY_USING_HAL)
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#if defined (CY_USING_HAL)
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extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj;
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#endif //defined (CY_USING_HAL)
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void init_cycfg_system(void);
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#if defined(__cplusplus)
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}
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#endif
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#endif /* CYCFG_SYSTEM_H */
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