From 54ef484afac4cd018afcf26848de5de6ab6ca18f Mon Sep 17 00:00:00 2001 From: Almir Okato Date: Tue, 7 Mar 2023 17:56:53 -0300 Subject: [PATCH] espressif: remove IDF git submodule and add its reference by param Remove the ESP-IDF from git submodules to avoid potential duplicated repo clones on the user system. IDF HAL code is still a dependency for Espressif port, therefore now the HAL code reference needs to be passed by parameter when building. The Espressif port was also updated to work with last v5.1 IDF code. Signed-off-by: Almir Okato --- .gitmodules | 4 - boot/espressif/CMakeLists.txt | 23 +- boot/espressif/hal/CMakeLists.txt | 180 ++++++----- boot/espressif/hal/esp-idf | 1 - boot/espressif/hal/include/bootloader_wdt.h | 1 - boot/espressif/hal/include/esp32/esp32.cmake | 24 +- boot/espressif/hal/include/esp32/sdkconfig.h | 9 + .../hal/include/esp32c3/esp32c3.cmake | 21 +- .../espressif/hal/include/esp32c3/sdkconfig.h | 9 + .../hal/include/esp32s2/esp32s2.cmake | 18 +- .../espressif/hal/include/esp32s2/sdkconfig.h | 9 + .../hal/include/esp32s3/esp32s3.cmake | 12 +- .../espressif/hal/include/esp32s3/sdkconfig.h | 8 + boot/espressif/hal/include/esp_log.h | 3 + boot/espressif/hal/src/bootloader_banner.c | 15 + .../hal/src/bootloader_init_common.c | 48 --- boot/espressif/hal/src/bootloader_wdt.c | 24 +- .../espressif/hal/src/esp32/bootloader_init.c | 202 ------------- .../hal/src/esp32/console_uart_custom.c | 24 ++ .../hal/src/esp32c3/bootloader_init.c | 221 -------------- .../hal/src/esp32c3/console_uart_custom.c | 22 ++ .../hal/src/esp32s2/bootloader_init.c | 168 ----------- .../hal/src/esp32s3/bootloader_init.c | 280 ------------------ boot/espressif/hal/src/flash_encrypt.c | 32 +- boot/espressif/hal/src/secure_boot.c | 16 + boot/espressif/main.c | 7 +- boot/espressif/port/esp32/ld/bootloader.ld | 18 +- boot/espressif/port/esp32/serial_adapter.c | 3 +- boot/espressif/port/esp32c3/ld/bootloader.ld | 17 +- boot/espressif/port/esp32c3/serial_adapter.c | 2 +- boot/espressif/port/esp32s2/ld/bootloader.ld | 14 +- boot/espressif/port/esp32s2/serial_adapter.c | 2 +- boot/espressif/port/esp32s3/ld/bootloader.ld | 15 +- boot/espressif/port/esp32s3/serial_adapter.c | 2 +- boot/espressif/port/esp_loader.c | 12 +- boot/espressif/port/esp_mcuboot.c | 10 +- boot/espressif/tools/toolchain-esp32.cmake | 6 +- boot/espressif/tools/toolchain-esp32c3.cmake | 6 +- boot/espressif/tools/toolchain-esp32s3.cmake | 6 +- 39 files changed, 388 insertions(+), 1106 deletions(-) delete mode 160000 boot/espressif/hal/esp-idf create mode 100644 boot/espressif/hal/src/bootloader_banner.c delete mode 100644 boot/espressif/hal/src/bootloader_init_common.c delete mode 100644 boot/espressif/hal/src/esp32/bootloader_init.c create mode 100644 boot/espressif/hal/src/esp32/console_uart_custom.c delete mode 100644 boot/espressif/hal/src/esp32c3/bootloader_init.c create mode 100644 boot/espressif/hal/src/esp32c3/console_uart_custom.c delete mode 100644 boot/espressif/hal/src/esp32s2/bootloader_init.c delete mode 100644 boot/espressif/hal/src/esp32s3/bootloader_init.c diff --git a/.gitmodules b/.gitmodules index bf510c93..37919b0f 100644 --- a/.gitmodules +++ b/.gitmodules @@ -19,7 +19,3 @@ [submodule "boot/cypress/libs/cy-mbedtls-acceleration"] path = boot/cypress/libs/cy-mbedtls-acceleration url = https://github.com/cypresssemiconductorco/cy-mbedtls-acceleration.git -[submodule "boot/espressif/hal/esp-idf"] - path = boot/espressif/hal/esp-idf - url = https://github.com/espressif/esp-idf.git - branch = release/v4.4 diff --git a/boot/espressif/CMakeLists.txt b/boot/espressif/CMakeLists.txt index bc4cd626..184c64b2 100644 --- a/boot/espressif/CMakeLists.txt +++ b/boot/espressif/CMakeLists.txt @@ -3,6 +3,7 @@ # SPDX-License-Identifier: Apache-2.0 cmake_minimum_required(VERSION 3.13) +cmake_policy(SET CMP0109 NEW) include(${CMAKE_CURRENT_LIST_DIR}/tools/utils.cmake) @@ -36,13 +37,15 @@ else() message(FATAL_ERROR "Unsupported target ${MCUBOOT_TARGET}") endif() -if (NOT DEFINED IDF_PATH) - if (EXISTS "${CMAKE_CURRENT_LIST_DIR}/hal/esp-idf") - set(IDF_PATH "${CMAKE_CURRENT_LIST_DIR}/hal/esp-idf") - elseif (DEFINED ENV{IDF_PATH}) - set(IDF_PATH $ENV{IDF_PATH}) +if (NOT DEFINED ESP_HAL_PATH) + if (DEFINED ENV{ESP_HAL_PATH}) + set(ESP_HAL_PATH $ENV{ESP_HAL_PATH}) else() - message(FATAL_ERROR "IDF_PATH not found. Please update submodules or set IDF_PATH environment variable or pass -DIDF_PATH flag.") + message(WARNING "ESP_HAL_PATH not found. Please set -DESP_HAL_PATH parameter or define ESP_HAL_PATH environment variable.") + if (DEFINED ENV{IDF_PATH}) + set(ESP_HAL_PATH $ENV{IDF_PATH}) + message("IDF installation found in the system, using IDF_PATH as ESP_HAL_PATH.") + endif() endif() endif() @@ -92,7 +95,11 @@ find_program(ESPTOOL_COMMAND NAMES esptool esptool.py ) if ("${ESPTOOL_COMMAND}" MATCHES "ESPTOOL_COMMAND-NOTFOUND") - set(esptool_path "${IDF_PATH}/components/esptool_py/esptool/esptool.py") + if (DEFINED ENV{IDF_PATH}) + set(esptool_path "${IDF_PATH}/components/esptool_py/esptool/esptool.py") + else() + message(FATAL_ERROR "esptool.py not found. Please install it using \'pip install esptool\'.") + endif() else() set(esptool_path "${ESPTOOL_COMMAND}") endif() @@ -179,7 +186,7 @@ set(CFLAGS "-ggdb" "-Os" "-D_GNU_SOURCE" - "-std=gnu99" + "-std=gnu17" "-Wno-old-style-declaration" "-Wno-implicit-int" "-Wno-declaration-after-statement" diff --git a/boot/espressif/hal/CMakeLists.txt b/boot/espressif/hal/CMakeLists.txt index c838bc3e..7f3d1bbb 100644 --- a/boot/espressif/hal/CMakeLists.txt +++ b/boot/espressif/hal/CMakeLists.txt @@ -6,8 +6,7 @@ cmake_minimum_required(VERSION 3.13) project(hal) -set(esp_idf_dir ${IDF_PATH}) - +set(esp_hal_dir ${ESP_HAL_PATH}) set(src_dir ${CMAKE_CURRENT_LIST_DIR}/src) set(include_dirs ${CMAKE_CURRENT_LIST_DIR}/include @@ -15,91 +14,107 @@ set(include_dirs ) list(APPEND include_dirs - ${esp_idf_dir}/components/${MCUBOOT_ARCH}/include - ${esp_idf_dir}/components/esp_common/include - ${esp_idf_dir}/components/esp_rom/include - ${esp_idf_dir}/components/esp_rom/include/${MCUBOOT_TARGET} - ${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET} - ${esp_idf_dir}/components/spi_flash/include - ${esp_idf_dir}/components/spi_flash/include/spi_flash - ${esp_idf_dir}/components/esp_hw_support/include - ${esp_idf_dir}/components/esp_hw_support/include/soc - ${esp_idf_dir}/components/esp_hw_support/include/soc/${MCUBOOT_TARGET} - ${esp_idf_dir}/components/esp_hw_support/port/include - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET} - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/private_include - ${esp_idf_dir}/components/soc/include - ${esp_idf_dir}/components/soc/${MCUBOOT_TARGET}/include - ${esp_idf_dir}/components/bootloader_support/include - ${esp_idf_dir}/components/bootloader_support/include_bootloader - ${esp_idf_dir}/components/hal/include - ${esp_idf_dir}/components/hal/platform_port/include - ${esp_idf_dir}/components/hal/${MCUBOOT_TARGET}/include - ${esp_idf_dir}/components/hal/${MCUBOOT_TARGET}/include/hal - ${esp_idf_dir}/components/heap/include - ${esp_idf_dir}/components/efuse/include - ${esp_idf_dir}/components/efuse/${MCUBOOT_TARGET}/include - ${esp_idf_dir}/components/efuse/private_include - ${esp_idf_dir}/components/efuse/${MCUBOOT_TARGET}/private_include - ${esp_idf_dir}/components/esp_system/include - ${esp_idf_dir}/components/newlib/platform_include + ${esp_hal_dir}/components/bootloader_support/include + ${esp_hal_dir}/components/bootloader_support/private_include + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/include + ${esp_hal_dir}/components/spi_flash/include + ${esp_hal_dir}/components/spi_flash/include/spi_flash + ${esp_hal_dir}/components/esp_app_format/include + ${esp_hal_dir}/components/newlib/platform_include + ${esp_hal_dir}/components/esp_common/include + ${esp_hal_dir}/components/${MCUBOOT_ARCH}/include + ${esp_hal_dir}/components/esp_rom/include + ${esp_hal_dir}/components/esp_rom/include/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/soc/include + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/efuse/include + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/efuse/private_include + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/private_include + ${esp_hal_dir}/components/esp_hw_support/include + ${esp_hal_dir}/components/esp_hw_support/include/soc + ${esp_hal_dir}/components/esp_hw_support/include/soc/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/esp_hw_support/port/include + ${esp_hal_dir}/components/esp_hw_support/include/esp_private + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/hal/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/hal/include + ${esp_hal_dir}/components/hal/platform_port/include + ${esp_hal_dir}/components/esp_system/include + ${esp_hal_dir}/components/log/include ) if("${MCUBOOT_ARCH}" STREQUAL "xtensa") list(APPEND include_dirs - ${esp_idf_dir}/components/${MCUBOOT_ARCH}/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/${MCUBOOT_ARCH}/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/${MCUBOOT_ARCH}/include ) endif() set(hal_srcs - ${src_dir}/bootloader_init_common.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_init.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_common.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_common_loader.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_console.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_console_loader.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_clock_init.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_clock_loader.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_efuse.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_panic.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_mem.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_random.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_random_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_utility.c + ${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c + ${esp_hal_dir}/components/bootloader_support/src/secure_boot_v2/secure_boot_signatures_bootloader.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_soc.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_sha.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/secure_boot_secure_features.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/flash_encryption_secure_features.c + ${esp_hal_dir}/components/hal/mpu_hal.c + ${esp_hal_dir}/components/hal/efuse_hal.c + ${esp_hal_dir}/components/hal/mmu_hal.c + ${esp_hal_dir}/components/hal/wdt_hal_iram.c + ${esp_hal_dir}/components/hal/${MCUBOOT_TARGET}/efuse_hal.c + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/uart_periph.c + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/gpio_periph.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_time.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_clk.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_clk_init.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_uart.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_sys.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_spiflash.c + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_table.c + ${esp_hal_dir}/components/efuse/src/esp_efuse_fields.c + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_fields.c + ${esp_hal_dir}/components/efuse/src/esp_efuse_api.c + ${esp_hal_dir}/components/efuse/src/esp_efuse_utility.c + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_utility.c + ${esp_hal_dir}/components/log/log_noos.c + ${src_dir}/bootloader_banner.c ${src_dir}/bootloader_wdt.c - ${src_dir}/secure_boot.c - ${src_dir}/flash_encrypt.c - ${src_dir}/${MCUBOOT_TARGET}/bootloader_init.c - ${esp_idf_dir}/components/hal/mpu_hal.c - ${esp_idf_dir}/components/hal/soc_hal.c - ${esp_idf_dir}/components/soc/${MCUBOOT_TARGET}/uart_periph.c - ${esp_idf_dir}/components/soc/${MCUBOOT_TARGET}/gpio_periph.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_common_loader.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_console.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_console_loader.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_flash.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_flash_config_${MCUBOOT_TARGET}.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_clock_init.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_efuse_${MCUBOOT_TARGET}.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_panic.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_mem.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_random.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_random_${MCUBOOT_TARGET}.c - ${esp_idf_dir}/components/bootloader_support/src/bootloader_utility.c - ${esp_idf_dir}/components/bootloader_support/src/esp_image_format.c - ${esp_idf_dir}/components/bootloader_support/src/secure_boot_v2/secure_boot_signatures_bootloader.c - ${esp_idf_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_soc.c - ${esp_idf_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_sha.c - ${esp_idf_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/secure_boot_secure_features.c - ${esp_idf_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/flash_encryption_secure_features.c - ${esp_idf_dir}/components/spi_flash/${MCUBOOT_TARGET}/spi_flash_rom_patch.c - ${esp_idf_dir}/components/esp_hw_support/esp_clk.c - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_time.c - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_clk.c - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_clk_init.c - ${esp_idf_dir}/components/hal/wdt_hal_iram.c - ${esp_idf_dir}/components/esp_hw_support/cpu_util.c - ${esp_idf_dir}/components/esp_rom/patches/esp_rom_uart.c - ${esp_idf_dir}/components/esp_rom/patches/esp_rom_sys.c - ${esp_idf_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_table.c - ${esp_idf_dir}/components/efuse/src/esp_efuse_fields.c - ${esp_idf_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_fields.c - ${esp_idf_dir}/components/efuse/src/esp_efuse_api.c - ${esp_idf_dir}/components/efuse/src/esp_efuse_utility.c - ${esp_idf_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_utility.c ) +if(DEFINED CONFIG_SECURE_BOOT_V2_ENABLED) + list(APPEND hal_srcs + ${src_dir}/secure_boot.c + ) +endif() + +if(DEFINED CONFIG_SECURE_FLASH_ENC_ENABLED) + list(APPEND hal_srcs + ${src_dir}/flash_encrypt.c + ) +endif() + if("${MCUBOOT_ARCH}" STREQUAL "xtensa") list(APPEND hal_srcs - ${esp_idf_dir}/components/esp_rom/patches/esp_rom_longjmp.S + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_longjmp.S ) endif() @@ -125,7 +140,7 @@ set(CFLAGS "-ggdb" "-Os" "-D_GNU_SOURCE" - "-std=gnu99" + "-std=gnu17" "-Wno-old-style-declaration" "-Wno-implicit-int" ) @@ -153,16 +168,23 @@ if("${MCUBOOT_ARCH}" STREQUAL "xtensa") endif() set(LINKER_SCRIPTS - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.ld - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.libgcc.ld - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.api.ld - -T${esp_idf_dir}/components/soc/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.peripherals.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.libgcc.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.api.ld + -T${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.peripherals.ld ) include(${CMAKE_CURRENT_LIST_DIR}/include/${MCUBOOT_TARGET}/${MCUBOOT_TARGET}.cmake) add_library(hal STATIC ${hal_srcs} ${include_dirs}) +# Wrap for overriding the print banner function from bootloader_support +add_definitions(-DIDF_VER=0) +target_link_libraries( + hal + INTERFACE + "-Wl,--wrap=bootloader_print_banner") + target_include_directories( hal PUBLIC diff --git a/boot/espressif/hal/esp-idf b/boot/espressif/hal/esp-idf deleted file mode 160000 index 8153bfe4..00000000 --- a/boot/espressif/hal/esp-idf +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 8153bfe4125e6a608abccf1561fd10285016c90a diff --git a/boot/espressif/hal/include/bootloader_wdt.h b/boot/espressif/hal/include/bootloader_wdt.h index 1295cf36..e5ac5517 100644 --- a/boot/espressif/hal/include/bootloader_wdt.h +++ b/boot/espressif/hal/include/bootloader_wdt.h @@ -6,4 +6,3 @@ #pragma once void bootloader_wdt_feed(void); -void bootloader_config_wdt(void); diff --git a/boot/espressif/hal/include/esp32/esp32.cmake b/boot/espressif/hal/include/esp32/esp32.cmake index 7d3776ef..6e72cedc 100644 --- a/boot/espressif/hal/include/esp32/esp32.cmake +++ b/boot/espressif/hal/include/esp32/esp32.cmake @@ -2,21 +2,31 @@ # # SPDX-License-Identifier: Apache-2.0 -list(APPEND include_dirs - ${esp_idf_dir}/components/${MCUBOOT_TARGET}/include - ) - list(APPEND hal_srcs - ${esp_idf_dir}/components/efuse/src/esp_efuse_api_key_esp32.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/without_key_purposes/three_key_blocks/esp_efuse_api_key.c ) if (DEFINED CONFIG_ESP_MULTI_PROCESSOR_BOOT) list(APPEND hal_srcs ${src_dir}/${MCUBOOT_TARGET}/app_cpu_start.c + ${esp_hal_dir}/components/esp_hw_support/cpu.c + ) +endif() + +if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c ) endif() list(APPEND LINKER_SCRIPTS - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib-funcs.ld - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.eco3.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib-funcs.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.eco3.ld ) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp32/bootloader_esp32.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + PROPERTIES COMPILE_FLAGS + "-Wno-unused-variable -Wno-unused-but-set-variable") diff --git a/boot/espressif/hal/include/esp32/sdkconfig.h b/boot/espressif/hal/include/esp32/sdkconfig.h index 6e76b633..7431e9b9 100644 --- a/boot/espressif/hal/include/esp32/sdkconfig.h +++ b/boot/espressif/hal/include/esp32/sdkconfig.h @@ -8,9 +8,17 @@ #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0000 #define CONFIG_IDF_TARGET_ESP32 1 #define CONFIG_ESP32_REV_MIN_3 1 +#define CONFIG_ESP32_REV_MIN_FULL 300 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32_REV_MIN_FULL #define CONFIG_ESP32_REV_MIN 3 +#define CONFIG_ESP32_REV_MAX_FULL 399 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32_REV_MAX_FULL #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_MMU_PAGE_SIZE 0x10000 #define CONFIG_ESP32_XTAL_FREQ 40 +#define CONFIG_XTAL_FREQ 40 +#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 1 +#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 #define CONFIG_MCUBOOT 1 #define NDEBUG 1 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 @@ -20,3 +28,4 @@ #define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 #define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 #define CONFIG_EFUSE_MAX_BLK_LEN 192 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/boot/espressif/hal/include/esp32c3/esp32c3.cmake b/boot/espressif/hal/include/esp32c3/esp32c3.cmake index 5d371922..3d4525a3 100644 --- a/boot/espressif/hal/include/esp32c3/esp32c3.cmake +++ b/boot/espressif/hal/include/esp32c3/esp32c3.cmake @@ -3,17 +3,18 @@ # SPDX-License-Identifier: Apache-2.0 list(APPEND hal_srcs - ${esp_idf_dir}/components/bootloader_support/src/flash_qio_mode.c - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/cpu_util_esp32c3.c - ${esp_idf_dir}/components/efuse/src/esp_efuse_api_key_esp32xx.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c ) +if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c + ) +endif() + list(APPEND LINKER_SCRIPTS - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.eco3.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.eco3.ld ) - -set_source_files_properties( - ${esp_idf_dir}/components/bootloader_support/src/flash_qio_mode.c - PROPERTIES COMPILE_FLAGS - "-Wno-unused-variable") diff --git a/boot/espressif/hal/include/esp32c3/sdkconfig.h b/boot/espressif/hal/include/esp32c3/sdkconfig.h index f091a135..08c616a9 100644 --- a/boot/espressif/hal/include/esp32c3/sdkconfig.h +++ b/boot/espressif/hal/include/esp32c3/sdkconfig.h @@ -7,7 +7,15 @@ #define BOOTLOADER_BUILD 1 #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0005 #define CONFIG_IDF_TARGET_ESP32C3 1 +#define CONFIG_ESP32C3_REV_MIN_3 1 +#define CONFIG_ESP32C3_REV_MIN_FULL 3 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32C3_REV_MIN_FULL +#define CONFIG_ESP32C3_REV_MIN 3 +#define CONFIG_ESP32C3_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32C3_REV_MAX_FULL #define CONFIG_IDF_TARGET_ARCH_RISCV 1 +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_XTAL_FREQ 40 #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 #define CONFIG_MCUBOOT 1 #define NDEBUG 1 @@ -18,3 +26,4 @@ #define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 #define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 #define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/boot/espressif/hal/include/esp32s2/esp32s2.cmake b/boot/espressif/hal/include/esp32s2/esp32s2.cmake index 7afafc6e..4f78e427 100644 --- a/boot/espressif/hal/include/esp32s2/esp32s2.cmake +++ b/boot/espressif/hal/include/esp32s2/esp32s2.cmake @@ -3,12 +3,20 @@ # SPDX-License-Identifier: Apache-2.0 list(APPEND hal_srcs - ${esp_idf_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/regi2c_ctrl.c - ${esp_idf_dir}/components/efuse/src/esp_efuse_api_key_esp32xx.c - ${esp_idf_dir}/components/esp_rom/patches/esp_rom_crc.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_crc.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_regi2c_esp32s2.c + ) list(APPEND LINKER_SCRIPTS - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib-funcs.ld - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.spiflash.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib-funcs.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.spiflash.ld ) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c + PROPERTIES COMPILE_FLAGS + "-Wno-unused-but-set-variable") diff --git a/boot/espressif/hal/include/esp32s2/sdkconfig.h b/boot/espressif/hal/include/esp32s2/sdkconfig.h index ed61b9b9..d041f968 100644 --- a/boot/espressif/hal/include/esp32s2/sdkconfig.h +++ b/boot/espressif/hal/include/esp32s2/sdkconfig.h @@ -7,6 +7,14 @@ #define BOOTLOADER_BUILD 1 #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0002 #define CONFIG_IDF_TARGET_ESP32S2 1 +#define CONFIG_ESP32S2_REV_MIN_0 1 +#define CONFIG_ESP32S2_REV_MIN_FULL 0 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32S2_REV_MIN_FULL +#define CONFIG_ESP32S2_REV_MIN 0 +#define CONFIG_ESP32S2_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32S2_REV_MAX_FULL +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_XTAL_FREQ 40 #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 #define CONFIG_ESP32S2_XTAL_FREQ 40 #define CONFIG_MCUBOOT 1 @@ -18,3 +26,4 @@ #define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 #define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 #define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/boot/espressif/hal/include/esp32s3/esp32s3.cmake b/boot/espressif/hal/include/esp32s3/esp32s3.cmake index f3241efc..b894c07e 100644 --- a/boot/espressif/hal/include/esp32s3/esp32s3.cmake +++ b/boot/espressif/hal/include/esp32s3/esp32s3.cmake @@ -3,15 +3,23 @@ # SPDX-License-Identifier: Apache-2.0 list(APPEND hal_srcs - ${esp_idf_dir}/components/efuse/src/esp_efuse_api_key_esp32xx.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c ) if (DEFINED CONFIG_ESP_MULTI_PROCESSOR_BOOT) list(APPEND hal_srcs ${src_dir}/${MCUBOOT_TARGET}/app_cpu_start.c + ${esp_hal_dir}/components/esp_hw_support/cpu.c ) endif() list(APPEND LINKER_SCRIPTS - -T${esp_idf_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld ) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c + PROPERTIES COMPILE_FLAGS + "-Wno-unused-variable -Wno-unused-but-set-variable") diff --git a/boot/espressif/hal/include/esp32s3/sdkconfig.h b/boot/espressif/hal/include/esp32s3/sdkconfig.h index e88d74f7..25581c80 100644 --- a/boot/espressif/hal/include/esp32s3/sdkconfig.h +++ b/boot/espressif/hal/include/esp32s3/sdkconfig.h @@ -7,6 +7,14 @@ #define BOOTLOADER_BUILD 1 #define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009 #define CONFIG_IDF_TARGET_ESP32S3 1 +#define CONFIG_ESP32S3_REV_MIN_0 1 +#define CONFIG_ESP32S3_REV_MIN_FULL 0 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32S3_REV_MIN_FULL +#define CONFIG_ESP32S3_REV_MIN 0 +#define CONFIG_ESP32S3_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32S3_REV_MAX_FULL +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_XTAL_FREQ 40 #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 #define CONFIG_MCUBOOT 1 #define NDEBUG 1 diff --git a/boot/espressif/hal/include/esp_log.h b/boot/espressif/hal/include/esp_log.h index 6fcab746..ad6270d7 100644 --- a/boot/espressif/hal/include/esp_log.h +++ b/boot/espressif/hal/include/esp_log.h @@ -5,6 +5,7 @@ */ #pragma once +#include #include /* Log levels from IDF are similar to MCUboot's */ @@ -24,3 +25,5 @@ #define ESP_EARLY_LOGI(tag, fmt, ...) MCUBOOT_LOG_INF("[%s] " fmt, tag, ##__VA_ARGS__) #define ESP_EARLY_LOGD(tag, fmt, ...) MCUBOOT_LOG_DBG("[%s] " fmt, tag, ##__VA_ARGS__) #define ESP_EARLY_LOGV(tag, fmt, ...) MCUBOOT_LOG_DBG("[%s] " fmt, tag, ##__VA_ARGS__) + +uint32_t esp_log_early_timestamp(void); diff --git a/boot/espressif/hal/src/bootloader_banner.c b/boot/espressif/hal/src/bootloader_banner.c new file mode 100644 index 00000000..8e7d7fca --- /dev/null +++ b/boot/espressif/hal/src/bootloader_banner.c @@ -0,0 +1,15 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/** + * Override the bootloader's print banner function from IDF. + */ +void __wrap_bootloader_print_banner(void) +{ + MCUBOOT_LOG_INF("*** Booting MCUboot build %s ***", MCUBOOT_VER); +} diff --git a/boot/espressif/hal/src/bootloader_init_common.c b/boot/espressif/hal/src/bootloader_init_common.c deleted file mode 100644 index 26a5af01..00000000 --- a/boot/espressif/hal/src/bootloader_init_common.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "sdkconfig.h" -#include "esp_attr.h" -#include "esp_log.h" -#include "bootloader_init.h" -#include "bootloader_common.h" - -#include "bootloader_flash_config.h" -#include "bootloader_flash.h" -#include "bootloader_flash_priv.h" - -static const char *TAG = "boot"; - -esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr; - -void bootloader_clear_bss_section(void) -{ - memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start)); -} - -esp_err_t bootloader_read_bootloader_header(void) -{ - /* load bootloader image header */ - if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &bootloader_image_hdr, sizeof(esp_image_header_t), true) != ESP_OK) { - ESP_LOGE(TAG, "failed to load bootloader image header!"); - return ESP_FAIL; - } - return ESP_OK; -} - -esp_err_t bootloader_check_bootloader_validity(void) -{ - /* read chip revision from efuse */ - uint8_t revision = bootloader_common_get_chip_revision(); - ESP_LOGI(TAG, "chip revision: %d", revision); - /* compare with the one set in bootloader image header */ - if (bootloader_common_check_chip_validity(&bootloader_image_hdr, ESP_IMAGE_BOOTLOADER) != ESP_OK) { - return ESP_FAIL; - } - return ESP_OK; -} diff --git a/boot/espressif/hal/src/bootloader_wdt.c b/boot/espressif/hal/src/bootloader_wdt.c index 197043b3..b9bcc6ea 100644 --- a/boot/espressif/hal/src/bootloader_wdt.c +++ b/boot/espressif/hal/src/bootloader_wdt.c @@ -10,30 +10,8 @@ void bootloader_wdt_feed(void) { - wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL}; + wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT(); wdt_hal_write_protect_disable(&rtc_wdt_ctx); wdt_hal_feed(&rtc_wdt_ctx); wdt_hal_write_protect_enable(&rtc_wdt_ctx); } - -void bootloader_config_wdt(void) -{ - wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL}; - wdt_hal_write_protect_disable(&rtc_wdt_ctx); - wdt_hal_set_flashboot_en(&rtc_wdt_ctx, false); - wdt_hal_write_protect_enable(&rtc_wdt_ctx); - -#ifdef CONFIG_ESP_MCUBOOT_WDT_ENABLE - wdt_hal_init(&rtc_wdt_ctx, WDT_RWDT, 0, false); - uint32_t stage_timeout_ticks = (uint32_t)((uint64_t)CONFIG_BOOTLOADER_WDT_TIME_MS * rtc_clk_slow_freq_get_hz() / 1000); - wdt_hal_write_protect_disable(&rtc_wdt_ctx); - wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC); - wdt_hal_enable(&rtc_wdt_ctx); - wdt_hal_write_protect_enable(&rtc_wdt_ctx); -#endif - - wdt_hal_context_t wdt_ctx = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0}; - wdt_hal_write_protect_disable(&wdt_ctx); - wdt_hal_set_flashboot_en(&wdt_ctx, false); - wdt_hal_write_protect_enable(&wdt_ctx); -} diff --git a/boot/espressif/hal/src/esp32/bootloader_init.c b/boot/espressif/hal/src/esp32/bootloader_init.c deleted file mode 100644 index 244648df..00000000 --- a/boot/espressif/hal/src/esp32/bootloader_init.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "sdkconfig.h" -#include "esp_attr.h" -#include "esp_image_format.h" - -#include "bootloader_init.h" -#include "bootloader_mem.h" -#include "bootloader_console.h" -#include "bootloader_clock.h" -#include "bootloader_flash_config.h" -#include "bootloader_flash.h" -#include "bootloader_flash_priv.h" - -#include "soc/dport_reg.h" -#include "soc/efuse_reg.h" -#include "soc/rtc.h" - -#include "bootloader_wdt.h" -#include "hal/wdt_hal.h" - -#include "esp32/rom/cache.h" -#include "esp32/rom/spi_flash.h" -#include "esp32/rom/uart.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr; - -#if CONFIG_ESP_CONSOLE_UART_CUSTOM -static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? - &UART0 : - (CONFIG_ESP_CONSOLE_UART_NUM == 1) ? - &UART1 : - &UART2; -#endif - - -static void bootloader_common_vddsdio_configure(void) -{ - rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config(); - if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) { /* VDDSDIO regulator is enabled @ 1.8V */ - cfg.drefh = 3; - cfg.drefm = 3; - cfg.drefl = 3; - cfg.force = 1; - rtc_vddsdio_set_config(cfg); - esp_rom_delay_us(10); /* wait for regulator to become stable */ - } -} - -static void bootloader_reset_mmu(void) -{ - /* completely reset MMU in case serial bootloader was running */ - Cache_Read_Disable(0); -#if !CONFIG_FREERTOS_UNICORE - Cache_Read_Disable(1); -#endif - Cache_Flush(0); -#if !CONFIG_FREERTOS_UNICORE - Cache_Flush(1); -#endif - mmu_init(0); -#if !CONFIG_FREERTOS_UNICORE - /* The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are - necessary to work around a hardware bug. */ - DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); - mmu_init(1); - DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); -#endif - - /* normal ROM boot exits with DROM0 cache unmasked, - but serial bootloader exits with it masked. */ - DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); -#if !CONFIG_FREERTOS_UNICORE - DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0); -#endif -} - -static esp_err_t bootloader_check_rated_cpu_clock(void) -{ - int rated_freq = bootloader_clock_get_rated_freq_mhz(); - if (rated_freq < 80) { - return ESP_FAIL; - } - return ESP_OK; -} - -static void update_flash_config(const esp_image_header_t *bootloader_hdr) -{ - uint32_t size; - switch (bootloader_hdr->spi_size) { - case ESP_IMAGE_FLASH_SIZE_1MB: - size = 1; - break; - case ESP_IMAGE_FLASH_SIZE_2MB: - size = 2; - break; - case ESP_IMAGE_FLASH_SIZE_4MB: - size = 4; - break; - case ESP_IMAGE_FLASH_SIZE_8MB: - size = 8; - break; - case ESP_IMAGE_FLASH_SIZE_16MB: - size = 16; - break; - default: - size = 2; - } - Cache_Read_Disable(0); - /* Set flash chip size */ - esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); - /* TODO: set mode */ - /* TODO: set frequency */ - Cache_Flush(0); - Cache_Read_Enable(0); -} - -static void IRAM_ATTR bootloader_init_flash_configure(void) -{ - bootloader_flash_gpio_config(&bootloader_image_hdr); - bootloader_flash_dummy_config(&bootloader_image_hdr); - bootloader_flash_cs_timing_config(); -} - -static esp_err_t bootloader_init_spi_flash(void) -{ - bootloader_init_flash_configure(); - esp_rom_spiflash_unlock(); - - update_flash_config(&bootloader_image_hdr); - return ESP_OK; -} - -#if CONFIG_ESP_CONSOLE_UART_CUSTOM -void IRAM_ATTR esp_rom_uart_putc(char c) -{ - while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); - uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); -} -#endif - -esp_err_t bootloader_init(void) -{ - esp_err_t ret = ESP_OK; - - bootloader_init_mem(); - - /* check that static RAM is after the stack */ -#ifndef NDEBUG - { - assert(&_bss_start <= &_bss_end); - assert(&_data_start <= &_data_end); - assert(sp < &_bss_start); - assert(sp < &_data_start); - } -#endif - /* clear bss section */ - bootloader_clear_bss_section(); - /* bootst up vddsdio */ - bootloader_common_vddsdio_configure(); - /* reset MMU */ - bootloader_reset_mmu(); - /* check rated CPU clock */ - if ((ret = bootloader_check_rated_cpu_clock()) != ESP_OK) { - goto err; - } - /* config clock */ - bootloader_clock_configure(); - /* initialize uart console, from now on, we can use ets_printf */ - bootloader_console_init(); - /* read bootloader header */ - if ((ret = bootloader_read_bootloader_header()) != ESP_OK) { - goto err; - } - // read chip revision and check if it's compatible to bootloader - if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) { - goto err; - } - /* initialize spi flash */ - if ((ret = bootloader_init_spi_flash()) != ESP_OK) { - goto err; - } - /* config WDT */ - bootloader_config_wdt(); -err: - return ret; -} diff --git a/boot/espressif/hal/src/esp32/console_uart_custom.c b/boot/espressif/hal/src/esp32/console_uart_custom.c new file mode 100644 index 00000000..f004be9f --- /dev/null +++ b/boot/espressif/hal/src/esp32/console_uart_custom.c @@ -0,0 +1,24 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#if CONFIG_ESP_CONSOLE_UART_CUSTOM +static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? + &UART0 : + (CONFIG_ESP_CONSOLE_UART_NUM == 1) ? + &UART1 : + &UART2; + +void IRAM_ATTR esp_rom_uart_putc(char c) +{ + while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); + uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); +} +#endif + diff --git a/boot/espressif/hal/src/esp32c3/bootloader_init.c b/boot/espressif/hal/src/esp32c3/bootloader_init.c deleted file mode 100644 index d3808d8e..00000000 --- a/boot/espressif/hal/src/esp32c3/bootloader_init.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include - -#include "sdkconfig.h" -#include "esp_attr.h" -#include "esp_image_format.h" - -#include "esp_rom_efuse.h" -#include "esp_rom_gpio.h" -#include "esp_rom_uart.h" -#include "esp_rom_sys.h" - -#include "bootloader_init.h" -#include "bootloader_common.h" -#include "bootloader_console.h" -#include "bootloader_clock.h" -#include "bootloader_flash_config.h" -#include "bootloader_mem.h" -#include "bootloader_flash.h" -#include "bootloader_flash_priv.h" -#include "regi2c_ctrl.h" - -#include "soc/extmem_reg.h" -#include "soc/io_mux_reg.h" -#include "soc/efuse_reg.h" -#include "soc/rtc.h" - -#include "hal/gpio_hal.h" -#include -#include - -#include "esp32c3/rom/cache.h" -#include "esp32c3/rom/spi_flash.h" - -#include "bootloader_wdt.h" -#include "hal/wdt_hal.h" - -extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr; - -#if CONFIG_ESP_CONSOLE_UART_CUSTOM -static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? - &UART0 : - &UART1; -#endif - -void IRAM_ATTR bootloader_configure_spi_pins(int drv) -{ - const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info(); - uint8_t wp_pin = esp_rom_efuse_get_flash_wp_gpio(); - uint8_t clk_gpio_num = SPI_CLK_GPIO_NUM; - uint8_t q_gpio_num = SPI_Q_GPIO_NUM; - uint8_t d_gpio_num = SPI_D_GPIO_NUM; - uint8_t cs0_gpio_num = SPI_CS0_GPIO_NUM; - uint8_t hd_gpio_num = SPI_HD_GPIO_NUM; - uint8_t wp_gpio_num = SPI_WP_GPIO_NUM; - if (spiconfig != 0) { - clk_gpio_num = spiconfig & 0x3f; - q_gpio_num = (spiconfig >> 6) & 0x3f; - d_gpio_num = (spiconfig >> 12) & 0x3f; - cs0_gpio_num = (spiconfig >> 18) & 0x3f; - hd_gpio_num = (spiconfig >> 24) & 0x3f; - wp_gpio_num = wp_pin; - } - esp_rom_gpio_pad_set_drv(clk_gpio_num, drv); - esp_rom_gpio_pad_set_drv(q_gpio_num, drv); - esp_rom_gpio_pad_set_drv(d_gpio_num, drv); - esp_rom_gpio_pad_set_drv(cs0_gpio_num, drv); - if (hd_gpio_num <= MAX_PAD_GPIO_NUM) { - esp_rom_gpio_pad_set_drv(hd_gpio_num, drv); - } - if (wp_gpio_num <= MAX_PAD_GPIO_NUM) { - esp_rom_gpio_pad_set_drv(wp_gpio_num, drv); - } -} - -static void bootloader_reset_mmu(void) -{ - Cache_Suspend_ICache(); - Cache_Invalidate_ICache_All(); - Cache_MMU_Init(); - - REG_CLR_BIT(EXTMEM_ICACHE_CTRL1_REG, EXTMEM_ICACHE_SHUT_IBUS); - REG_CLR_BIT(EXTMEM_ICACHE_CTRL1_REG, EXTMEM_ICACHE_SHUT_DBUS); -} - -static void update_flash_config(const esp_image_header_t *bootloader_hdr) -{ - uint32_t size; - switch (bootloader_hdr->spi_size) { - case ESP_IMAGE_FLASH_SIZE_1MB: - size = 1; - break; - case ESP_IMAGE_FLASH_SIZE_2MB: - size = 2; - break; - case ESP_IMAGE_FLASH_SIZE_4MB: - size = 4; - break; - case ESP_IMAGE_FLASH_SIZE_8MB: - size = 8; - break; - case ESP_IMAGE_FLASH_SIZE_16MB: - size = 16; - break; - default: - size = 2; - } - uint32_t autoload = Cache_Suspend_ICache(); - // Set flash chip size - esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); - Cache_Resume_ICache(autoload); -} - -static void IRAM_ATTR bootloader_init_flash_configure(void) -{ - bootloader_flash_dummy_config(&bootloader_image_hdr); - bootloader_flash_cs_timing_config(); -} - -static void bootloader_spi_flash_resume(void) -{ - bootloader_execute_flash_command(CMD_RESUME, 0, 0, 0); - esp_rom_spiflash_wait_idle(&g_rom_flashchip); -} - -static esp_err_t bootloader_init_spi_flash(void) -{ - bootloader_init_flash_configure(); - bootloader_spi_flash_resume(); - esp_rom_spiflash_unlock(); - update_flash_config(&bootloader_image_hdr); - - return ESP_OK; -} - -static inline void bootloader_hardware_init(void) -{ - // This check is always included in the bootloader so it can - // print the minimum revision error message later in the boot - if (bootloader_common_get_chip_revision() < 3) { - REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_XPD_IPH, 1); - REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 12); - } -} - -static inline void bootloader_glitch_reset_disable(void) -{ - /* - For origin chip & ECO1: only support swt reset; - For ECO2: fix brownout reset bug, support swt & brownout reset; - For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset. - */ - uint8_t chip_version = bootloader_common_get_chip_revision(); - if (chip_version < 2) { - REG_SET_FIELD(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SEL, RTC_CNTL_FIB_SUPER_WDT_RST); - } else if (chip_version == 2) { - REG_SET_FIELD(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SEL, RTC_CNTL_FIB_SUPER_WDT_RST | RTC_CNTL_FIB_BOR_RST); - } -} - -static void bootloader_super_wdt_auto_feed(void) -{ - REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); - REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN); - REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0); -} - -#if CONFIG_ESP_CONSOLE_UART_CUSTOM -void IRAM_ATTR esp_rom_uart_putc(char c) -{ - while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); - uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); -} -#endif - -esp_err_t bootloader_init(void) -{ - esp_err_t ret = ESP_OK; - - bootloader_hardware_init(); - bootloader_glitch_reset_disable(); - bootloader_super_wdt_auto_feed(); - // protect memory region - bootloader_init_mem(); - /* check that static RAM is after the stack */ - assert(&_bss_start <= &_bss_end); - assert(&_data_start <= &_data_end); - // clear bss section - bootloader_clear_bss_section(); - // reset MMU - bootloader_reset_mmu(); - // config clock - bootloader_clock_configure(); - /* initialize uart console, from now on, we can use ets_printf */ - bootloader_console_init(); - // update flash ID - bootloader_flash_update_id(); - // read bootloader header - if ((ret = bootloader_read_bootloader_header()) != ESP_OK) { - goto err; - } - // read chip revision and check if it's compatible to bootloader - if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) { - goto err; - } - // initialize spi flash - if ((ret = bootloader_init_spi_flash()) != ESP_OK) { - goto err; - } - // config WDT - bootloader_config_wdt(); -err: - return ret; -} diff --git a/boot/espressif/hal/src/esp32c3/console_uart_custom.c b/boot/espressif/hal/src/esp32c3/console_uart_custom.c new file mode 100644 index 00000000..214c60fb --- /dev/null +++ b/boot/espressif/hal/src/esp32c3/console_uart_custom.c @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#if CONFIG_ESP_CONSOLE_UART_CUSTOM +static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? + &UART0 : + &UART1; + +void IRAM_ATTR esp_rom_uart_putc(char c) +{ + while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); + uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); +} +#endif + diff --git a/boot/espressif/hal/src/esp32s2/bootloader_init.c b/boot/espressif/hal/src/esp32s2/bootloader_init.c deleted file mode 100644 index a3e4b2f8..00000000 --- a/boot/espressif/hal/src/esp32s2/bootloader_init.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "sdkconfig.h" -#include "esp_attr.h" -#include "esp_image_format.h" - -#include "esp_rom_efuse.h" -#include "esp_rom_gpio.h" - -#include "bootloader_init.h" -#include "bootloader_common.h" -#include "bootloader_console.h" -#include "bootloader_mem.h" -#include "bootloader_clock.h" -#include "bootloader_flash_config.h" -#include "bootloader_flash.h" -#include "bootloader_flash_priv.h" - -#include "soc/dport_reg.h" -#include "soc/efuse_reg.h" -#include "soc/rtc.h" -#include "soc/extmem_reg.h" -#include "soc/io_mux_reg.h" - -#include "bootloader_wdt.h" -#include "hal/wdt_hal.h" - -#include "esp32s2/rom/cache.h" -#include "esp32s2/rom/ets_sys.h" -#include "esp32s2/rom/spi_flash.h" -#include "esp32s2/rom/uart.h" - -extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr; - -static void bootloader_reset_mmu(void) -{ - Cache_Suspend_ICache(); - Cache_Invalidate_ICache_All(); - Cache_MMU_Init(); - - /* normal ROM boot exits with DROM0 cache unmasked, - but serial bootloader exits with it masked. */ - REG_CLR_BIT(EXTMEM_PRO_ICACHE_CTRL1_REG, EXTMEM_PRO_ICACHE_MASK_DROM0); -} - -static void update_flash_config(const esp_image_header_t *bootloader_hdr) -{ - uint32_t size; - switch (bootloader_hdr->spi_size) { - case ESP_IMAGE_FLASH_SIZE_1MB: - size = 1; - break; - case ESP_IMAGE_FLASH_SIZE_2MB: - size = 2; - break; - case ESP_IMAGE_FLASH_SIZE_4MB: - size = 4; - break; - case ESP_IMAGE_FLASH_SIZE_8MB: - size = 8; - break; - case ESP_IMAGE_FLASH_SIZE_16MB: - size = 16; - break; - default: - size = 2; - } - uint32_t autoload = Cache_Suspend_ICache(); - // Set flash chip size - esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); - Cache_Resume_ICache(autoload); -} - -void IRAM_ATTR bootloader_configure_spi_pins(int drv) -{ - const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info(); - uint8_t wp_pin = esp_rom_efuse_get_flash_wp_gpio(); - uint8_t clk_gpio_num = SPI_CLK_GPIO_NUM; - uint8_t q_gpio_num = SPI_Q_GPIO_NUM; - uint8_t d_gpio_num = SPI_D_GPIO_NUM; - uint8_t cs0_gpio_num = SPI_CS0_GPIO_NUM; - uint8_t hd_gpio_num = SPI_HD_GPIO_NUM; - uint8_t wp_gpio_num = SPI_WP_GPIO_NUM; - if (spiconfig != 0) { - clk_gpio_num = spiconfig & 0x3f; - q_gpio_num = (spiconfig >> 6) & 0x3f; - d_gpio_num = (spiconfig >> 12) & 0x3f; - cs0_gpio_num = (spiconfig >> 18) & 0x3f; - hd_gpio_num = (spiconfig >> 24) & 0x3f; - wp_gpio_num = wp_pin; - } - esp_rom_gpio_pad_set_drv(clk_gpio_num, drv); - esp_rom_gpio_pad_set_drv(q_gpio_num, drv); - esp_rom_gpio_pad_set_drv(d_gpio_num, drv); - esp_rom_gpio_pad_set_drv(cs0_gpio_num, drv); - if (hd_gpio_num <= MAX_PAD_GPIO_NUM) { - esp_rom_gpio_pad_set_drv(hd_gpio_num, drv); - } - if (wp_gpio_num <= MAX_PAD_GPIO_NUM) { - esp_rom_gpio_pad_set_drv(wp_gpio_num, drv); - } -} - -static void IRAM_ATTR bootloader_init_flash_configure(void) -{ - bootloader_flash_dummy_config(&bootloader_image_hdr); - bootloader_flash_cs_timing_config(); -} - -static esp_err_t bootloader_init_spi_flash(void) -{ - bootloader_init_flash_configure(); - esp_rom_spiflash_unlock(); - - update_flash_config(&bootloader_image_hdr); - return ESP_OK; -} - -static void bootloader_super_wdt_auto_feed(void) -{ - REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN); -} - -esp_err_t bootloader_init(void) -{ - esp_err_t ret = ESP_OK; - bootloader_super_wdt_auto_feed(); - - bootloader_init_mem(); - - /* check that static RAM is after the stack */ -#ifndef NDEBUG - { - assert(&_bss_start <= &_bss_end); - assert(&_data_start <= &_data_end); - } -#endif - /* clear bss section */ - bootloader_clear_bss_section(); - /* reset MMU */ - bootloader_reset_mmu(); - /* config clock */ - bootloader_clock_configure(); - /* initialize uart console, from now on, we can use ets_printf */ - bootloader_console_init(); - /* read bootloader header */ - if ((ret = bootloader_read_bootloader_header()) != ESP_OK) { - goto err; - } - // read chip revision and check if it's compatible to bootloader - if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) { - goto err; - } - /* initialize spi flash */ - if ((ret = bootloader_init_spi_flash()) != ESP_OK) { - goto err; - } - /* config WDT */ - bootloader_config_wdt(); -err: - return ret; -} diff --git a/boot/espressif/hal/src/esp32s3/bootloader_init.c b/boot/espressif/hal/src/esp32s3/bootloader_init.c deleted file mode 100644 index 455173ba..00000000 --- a/boot/espressif/hal/src/esp32s3/bootloader_init.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "sdkconfig.h" -#include "esp_attr.h" -#include "esp_image_format.h" -#include "flash_qio_mode.h" -#include "esp_rom_efuse.h" -#include "esp_rom_gpio.h" -#include "esp_rom_sys.h" -#include "esp_rom_uart.h" -#include "esp_efuse.h" - -#include "bootloader_init.h" -#include "bootloader_common.h" -#include "bootloader_console.h" -#include "bootloader_mem.h" -#include "bootloader_clock.h" -#include "bootloader_flash_config.h" -#include "bootloader_flash.h" -#include "bootloader_flash_priv.h" -#include "bootloader_soc.h" - -#include "soc/cpu.h" -#include "soc/dport_reg.h" -#include "soc/efuse_reg.h" -#include "soc/rtc.h" -#include "soc/rtc_cntl_reg.h" -#include "soc/extmem_reg.h" -#include "soc/io_mux_reg.h" -#include "soc/assist_debug_reg.h" - -#include "bootloader_wdt.h" -#include "hal/wdt_hal.h" - -#include "esp32s3/rom/cache.h" -#include "esp32s3/rom/ets_sys.h" -#include "esp32s3/rom/spi_flash.h" -#include "esp32s3/rom/uart.h" - -#include "esp_log.h" -#include "mcuboot_config/mcuboot_config.h" - -static const char *TAG = "boot.esp32s3"; - -extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr; - -static void bootloader_reset_mmu(void) -{ - Cache_Suspend_DCache(); - Cache_Invalidate_DCache_All(); - Cache_MMU_Init(); - - REG_CLR_BIT(EXTMEM_ICACHE_CTRL1_REG, EXTMEM_ICACHE_SHUT_CORE0_BUS); - REG_CLR_BIT(EXTMEM_ICACHE_CTRL1_REG, EXTMEM_ICACHE_SHUT_CORE1_BUS); -} - -static void update_flash_config(const esp_image_header_t *bootloader_hdr) -{ - uint32_t size; - switch (bootloader_hdr->spi_size) { - case ESP_IMAGE_FLASH_SIZE_1MB: - size = 1; - break; - case ESP_IMAGE_FLASH_SIZE_2MB: - size = 2; - break; - case ESP_IMAGE_FLASH_SIZE_4MB: - size = 4; - break; - case ESP_IMAGE_FLASH_SIZE_8MB: - size = 8; - break; - case ESP_IMAGE_FLASH_SIZE_16MB: - size = 16; - break; - default: - size = 2; - } - uint32_t autoload = Cache_Suspend_DCache(); - // Set flash chip size - esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); - Cache_Resume_DCache(autoload); -} - -void IRAM_ATTR bootloader_configure_spi_pins(int drv) -{ - const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info(); - uint8_t wp_pin = esp_rom_efuse_get_flash_wp_gpio(); - uint8_t clk_gpio_num = SPI_CLK_GPIO_NUM; - uint8_t q_gpio_num = SPI_Q_GPIO_NUM; - uint8_t d_gpio_num = SPI_D_GPIO_NUM; - uint8_t cs0_gpio_num = SPI_CS0_GPIO_NUM; - uint8_t hd_gpio_num = SPI_HD_GPIO_NUM; - uint8_t wp_gpio_num = SPI_WP_GPIO_NUM; - if (spiconfig == 0) { - - } else { - clk_gpio_num = spiconfig & 0x3f; - q_gpio_num = (spiconfig >> 6) & 0x3f; - d_gpio_num = (spiconfig >> 12) & 0x3f; - cs0_gpio_num = (spiconfig >> 18) & 0x3f; - hd_gpio_num = (spiconfig >> 24) & 0x3f; - wp_gpio_num = wp_pin; - } - esp_rom_gpio_pad_set_drv(clk_gpio_num, drv); - esp_rom_gpio_pad_set_drv(q_gpio_num, drv); - esp_rom_gpio_pad_set_drv(d_gpio_num, drv); - esp_rom_gpio_pad_set_drv(cs0_gpio_num, drv); - if (hd_gpio_num <= MAX_PAD_GPIO_NUM) { - esp_rom_gpio_pad_set_drv(hd_gpio_num, drv); - } - if (wp_gpio_num <= MAX_PAD_GPIO_NUM) { - esp_rom_gpio_pad_set_drv(wp_gpio_num, drv); - } -} - -static void IRAM_ATTR bootloader_init_flash_configure(void) -{ - bootloader_flash_dummy_config(&bootloader_image_hdr); - bootloader_flash_cs_timing_config(); -} - -static esp_err_t bootloader_init_spi_flash(void) -{ - bootloader_init_flash_configure(); -#ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH - const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info(); - if (spiconfig != ESP_ROM_EFUSE_FLASH_DEFAULT_SPI && spiconfig != ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI) { - ESP_LOGE(TAG, "SPI flash pins are overridden. Enable CONFIG_SPI_FLASH_ROM_DRIVER_PATCH in menuconfig"); - return ESP_FAIL; - } -#endif - - bootloader_flash_unlock(); - update_flash_config(&bootloader_image_hdr); - //ensure the flash is write-protected - bootloader_enable_wp(); - return ESP_OK; -} - -static void wdt_reset_cpu0_info_enable(void) -{ - REG_SET_BIT(SYSTEM_CPU_PERI_CLK_EN_REG, SYSTEM_CLK_EN_ASSIST_DEBUG); - REG_CLR_BIT(SYSTEM_CPU_PERI_RST_EN_REG, SYSTEM_RST_EN_ASSIST_DEBUG); - REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE_REG, 1); - REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_RECORDING_REG, 1); -} - -#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG -static void wdt_reset_info_dump(int cpu) -{ - uint32_t inst = 0, pid = 0, stat = 0, data = 0, pc = 0, - lsstat = 0, lsaddr = 0, lsdata = 0, dstat = 0; - const char *cpu_name = cpu ? "APP" : "PRO"; - - stat = 0xdeadbeef; - pid = 0; - if (cpu == 0) { - inst = REG_READ(ASSIST_DEBUG_CORE_0_RCD_PDEBUGINST_REG); - dstat = REG_READ(ASSIST_DEBUG_CORE_0_RCD_PDEBUGSTATUS_REG); - data = REG_READ(ASSIST_DEBUG_CORE_0_RCD_PDEBUGDATA_REG); - pc = REG_READ(ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_REG); - lsstat = REG_READ(ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0STAT_REG); - lsaddr = REG_READ(ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0ADDR_REG); - lsdata = REG_READ(ASSIST_DEBUG_CORE_0_RCD_PDEBUGLS0DATA_REG); - } else { - inst = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGINST_REG); - dstat = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGSTATUS_REG); - data = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGDATA_REG); - pc = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_REG); - lsstat = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0STAT_REG); - lsaddr = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_REG); - lsdata = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_REG); - } - - ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08x", cpu_name, stat); - ESP_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08x", cpu_name, pid); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08x", cpu_name, inst); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08x", cpu_name, dstat); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08x", cpu_name, data); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08x", cpu_name, pc); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08x", cpu_name, lsstat); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08x", cpu_name, lsaddr); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08x", cpu_name, lsdata); -} -#endif - -static void bootloader_check_wdt_reset(void) -{ - int wdt_rst = 0; - soc_reset_reason_t rst_reas[2]; - - rst_reas[0] = esp_rom_get_reset_reason(0); - rst_reas[1] = esp_rom_get_reset_reason(1); - if (rst_reas[0] == RESET_REASON_CORE_RTC_WDT || rst_reas[0] == RESET_REASON_CORE_MWDT0 || rst_reas[0] == RESET_REASON_CORE_MWDT1 || - rst_reas[0] == RESET_REASON_CPU0_MWDT0 || rst_reas[0] == RESET_REASON_CPU0_RTC_WDT) { - ESP_LOGW(TAG, "PRO CPU has been reset by WDT."); - wdt_rst = 1; - } - if (rst_reas[1] == RESET_REASON_CORE_RTC_WDT || rst_reas[1] == RESET_REASON_CORE_MWDT0 || rst_reas[1] == RESET_REASON_CORE_MWDT1 || - rst_reas[1] == RESET_REASON_CPU1_MWDT1 || rst_reas[1] == RESET_REASON_CPU1_RTC_WDT) { - ESP_LOGW(TAG, "APP CPU has been reset by WDT."); - wdt_rst = 1; - } - if (wdt_rst) { -#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG - // if reset by WDT dump info from trace port - wdt_reset_info_dump(0); - wdt_reset_info_dump(1); -#endif - } - wdt_reset_cpu0_info_enable(); -} - -static void bootloader_super_wdt_auto_feed(void) -{ - REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); - REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN); - REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0);} - -static inline void bootloader_ana_reset_config(void) -{ - //Enable WDT, BOR, and GLITCH reset - bootloader_ana_super_wdt_reset_config(true); - bootloader_ana_bod_reset_config(true); - bootloader_ana_clock_glitch_reset_config(true); -} - -esp_err_t bootloader_init(void) -{ - esp_err_t ret = ESP_OK; - bootloader_ana_reset_config(); - bootloader_super_wdt_auto_feed(); - // protect memory region - bootloader_init_mem(); - /* check that static RAM is after the stack */ -#ifndef NDEBUG - { - assert(&_bss_start <= &_bss_end); - assert(&_data_start <= &_data_end); - } -#endif - // clear bss section - bootloader_clear_bss_section(); - // reset MMU - bootloader_reset_mmu(); - // config clock - bootloader_clock_configure(); - /* initialize uart console, from now on, we can use ets_printf */ - bootloader_console_init(); - // Check and run XMC startup flow - if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) { - goto err; - } - // read bootloader header - if ((ret = bootloader_read_bootloader_header()) != ESP_OK) { - goto err; - } - // read chip revision and check if it's compatible to bootloader - if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) { - goto err; - } - // initialize spi flash - if ((ret = bootloader_init_spi_flash()) != ESP_OK) { - goto err; - } - // check whether a WDT reset happend - bootloader_check_wdt_reset(); - // config WDT - bootloader_config_wdt(); - -err: - return ret; -} diff --git a/boot/espressif/hal/src/flash_encrypt.c b/boot/espressif/hal/src/flash_encrypt.c index 77f5992b..222e32e2 100644 --- a/boot/espressif/hal/src/flash_encrypt.c +++ b/boot/espressif/hal/src/flash_encrypt.c @@ -41,6 +41,36 @@ static esp_err_t encrypt_flash_contents(uint32_t flash_crypt_cnt, bool flash_cry static esp_err_t encrypt_bootloader(void); static esp_err_t encrypt_primary_slot(void); +/** + * This former inlined function must not be defined in the header file anymore. + * As it depends on efuse component, any use of it outside of `bootloader_support`, + * would require the caller component to include `efuse` as part of its `REQUIRES` or + * `PRIV_REQUIRES` entries. + * Attribute IRAM_ATTR must be specified for the app build. + */ +bool IRAM_ATTR esp_flash_encryption_enabled(void) +{ + uint32_t flash_crypt_cnt = 0; +#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH + flash_crypt_cnt = efuse_ll_get_flash_crypt_cnt(); +#else +#if CONFIG_IDF_TARGET_ESP32 + esp_efuse_read_field_blob(ESP_EFUSE_FLASH_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_FLASH_CRYPT_CNT[0]->bit_count); +#else + esp_efuse_read_field_blob(ESP_EFUSE_SPI_BOOT_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_SPI_BOOT_CRYPT_CNT[0]->bit_count); +#endif +#endif + /* __builtin_parity is in flash, so we calculate parity inline */ + bool enabled = false; + while (flash_crypt_cnt) { + if (flash_crypt_cnt & 1) { + enabled = !enabled; + } + flash_crypt_cnt >>= 1; + } + return enabled; +} + esp_err_t esp_flash_encrypt_check_and_update(void) { size_t flash_crypt_cnt = 0; @@ -360,7 +390,7 @@ esp_err_t esp_flash_encrypt_region(uint32_t src_addr, size_t data_length) return ESP_FAIL; } - wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL}; + wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT(); for (size_t i = 0; i < data_length; i += FLASH_SECTOR_SIZE) { wdt_hal_write_protect_disable(&rtc_wdt_ctx); wdt_hal_feed(&rtc_wdt_ctx); diff --git a/boot/espressif/hal/src/secure_boot.c b/boot/espressif/hal/src/secure_boot.c index 9cb24be2..5c6a4755 100644 --- a/boot/espressif/hal/src/secure_boot.c +++ b/boot/espressif/hal/src/secure_boot.c @@ -15,6 +15,22 @@ #include "esp_efuse.h" #include "esp_efuse_table.h" +#if CONFIG_IDF_TARGET_ESP32 +#include "esp32/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32C3 +#include "esp32c3/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32C2 +#include "esp32c2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32C6 +#include "esp32c6/rom/secure_boot.h" +#endif + /* The following API implementations are used only when called * from the bootloader code. */ diff --git a/boot/espressif/main.c b/boot/espressif/main.c index f7778b92..9e1aa070 100644 --- a/boot/espressif/main.c +++ b/boot/espressif/main.c @@ -13,6 +13,8 @@ #include "bootloader_utility.h" #include "bootloader_random.h" +#include "esp_assert.h" + #ifdef CONFIG_MCUBOOT_SERIAL #include "boot_serial/boot_serial.h" #include "serial_adapter/serial_adapter.h" @@ -99,9 +101,6 @@ int main() FIH_PANIC; } - BOOT_LOG_INF("Enabling RNG early entropy source..."); - bootloader_random_enable(); - /* Rough steps for a first boot when Secure Boot and/or Flash Encryption are still disabled on device: * Secure Boot: * 1) Calculate the SHA-256 hash digest of the public key and write to EFUSE. @@ -142,8 +141,6 @@ int main() } #endif - BOOT_LOG_INF("*** Booting MCUboot build %s ***", MCUBOOT_VER); - os_heap_init(); struct boot_rsp rsp; diff --git a/boot/espressif/port/esp32/ld/bootloader.ld b/boot/espressif/port/esp32/ld/bootloader.ld index 4e3ad89a..48b6ff56 100644 --- a/boot/espressif/port/esp32/ld/bootloader.ld +++ b/boot/espressif/port/esp32/ld/bootloader.ld @@ -12,9 +12,9 @@ MEMORY { - iram_seg (RWX) : org = 0x40093000, len = 0x8800 - iram_loader_seg (RWX) : org = 0x4009B800, len = 0x4800 - dram_seg (RW) : org = 0x3FFF5000, len = 0x8900 + iram_seg (RWX) : org = 0x40093000, len = 0x7A00 + iram_loader_seg (RWX) : org = 0x4009AA00, len = 0x5600 + dram_seg (RW) : org = 0x3FFF5000, len = 0x9900 } /* Default entry point: */ @@ -31,13 +31,13 @@ SECTIONS *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_flash_config_esp32.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) - *libhal.a:bootloader_init_common.*(.literal .text .literal.* .text.*) - *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) - *libhal.a:bootloader_efuse_esp32.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*) @@ -51,12 +51,16 @@ SECTIONS *libhal.a:secure_boot.*(.literal .text .literal.* .text.*) *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*) - *libhal.a:esp_efuse_api_key_esp32.*(.literal .text .literal.* .text.*) + *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_time.*(.literal .text .literal.* .text.*) *libhal.a:app_cpu_start.*(.literal .text .literal.* .text.*) *esp_mcuboot.*(.literal .text .literal.* .text.*) *esp_loader.*(.literal .text .literal.* .text.*) diff --git a/boot/espressif/port/esp32/serial_adapter.c b/boot/espressif/port/esp32/serial_adapter.c index 348ee9a5..af32723d 100644 --- a/boot/espressif/port/esp32/serial_adapter.c +++ b/boot/espressif/port/esp32/serial_adapter.c @@ -121,8 +121,9 @@ int boot_console_init(void) 0, 0); gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); uart_ll_set_mode_normal(serial_boot_uart_dev); - uart_ll_set_baudrate(serial_boot_uart_dev, 115200); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); uart_ll_set_rx_tout(serial_boot_uart_dev, 16); diff --git a/boot/espressif/port/esp32c3/ld/bootloader.ld b/boot/espressif/port/esp32c3/ld/bootloader.ld index f200f5d1..304e79fb 100644 --- a/boot/espressif/port/esp32c3/ld/bootloader.ld +++ b/boot/espressif/port/esp32c3/ld/bootloader.ld @@ -13,8 +13,8 @@ MEMORY { iram_seg (RWX) : org = 0x403C8000, len = 0x8000 - iram_loader_seg (RWX) : org = 0x403D0000, len = 0x4800 - dram_seg (RW) : org = 0x3FCD5000, len = 0x8C00 + iram_loader_seg (RWX) : org = 0x403D0000, len = 0x5000 + dram_seg (RW) : org = 0x3FCD5000, len = 0x9000 } /* Default entry point: */ @@ -31,12 +31,13 @@ SECTIONS *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_flash_config_esp32c3.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) - *libhal.a:bootloader_init_common.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) - *libhal.a:bootloader_efuse_esp32c3.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*) @@ -51,11 +52,17 @@ SECTIONS *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*) - *libhal.a:esp_efuse_api_key_esp32xx.*(.literal .text .literal.* .text.*) + *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_time.*(.literal .text .literal.* .text.*) + *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) *esp_mcuboot.*(.literal .text .literal.* .text.*) *esp_loader.*(.literal .text .literal.* .text.*) *(.fini.literal) diff --git a/boot/espressif/port/esp32c3/serial_adapter.c b/boot/espressif/port/esp32c3/serial_adapter.c index c6265d46..09643a13 100644 --- a/boot/espressif/port/esp32c3/serial_adapter.c +++ b/boot/espressif/port/esp32c3/serial_adapter.c @@ -169,7 +169,7 @@ int boot_console_init(void) uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); uart_ll_set_mode_normal(serial_boot_uart_dev); - uart_ll_set_baudrate(serial_boot_uart_dev, 115200); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); uart_ll_set_rx_tout(serial_boot_uart_dev, 16); diff --git a/boot/espressif/port/esp32s2/ld/bootloader.ld b/boot/espressif/port/esp32s2/ld/bootloader.ld index 75315e17..005c046c 100644 --- a/boot/espressif/port/esp32s2/ld/bootloader.ld +++ b/boot/espressif/port/esp32s2/ld/bootloader.ld @@ -31,13 +31,14 @@ SECTIONS *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_flash_config_esp32s2.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) - *libhal.a:bootloader_init_common.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) - *libhal.a:bootloader_efuse_esp32s2.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*) @@ -52,11 +53,18 @@ SECTIONS *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*) - *libhal.a:esp_efuse_api_key_esp32xx.*(.literal .text .literal.* .text.*) + *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_time.*(.literal .text .literal.* .text.*) + *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) + *libhal.a:esp_rom_regi2c_esp32s2.*(.literal .text .literal.* .text.*) *esp_mcuboot.*(.literal .text .literal.* .text.*) *esp_loader.*(.literal .text .literal.* .text.*) *(.fini.literal) diff --git a/boot/espressif/port/esp32s2/serial_adapter.c b/boot/espressif/port/esp32s2/serial_adapter.c index 0706a0d7..e22a6baa 100644 --- a/boot/espressif/port/esp32s2/serial_adapter.c +++ b/boot/espressif/port/esp32s2/serial_adapter.c @@ -135,7 +135,7 @@ int boot_console_init(void) uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); uart_ll_set_mode_normal(serial_boot_uart_dev); - uart_ll_set_baudrate(serial_boot_uart_dev, 115200); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); uart_ll_set_rx_tout(serial_boot_uart_dev, 16); diff --git a/boot/espressif/port/esp32s3/ld/bootloader.ld b/boot/espressif/port/esp32s3/ld/bootloader.ld index 9217642d..4fe9cd6c 100644 --- a/boot/espressif/port/esp32s3/ld/bootloader.ld +++ b/boot/espressif/port/esp32s3/ld/bootloader.ld @@ -12,7 +12,7 @@ MEMORY { - iram_seg (RWX) : org = 0x403B2500, len = 0x7B00 + iram_seg (RWX) : org = 0x403B2000, len = 0x8000 iram_loader_seg (RWX) : org = 0x403BA000, len = 0x6000 dram_seg (RW) : org = 0x3FCD8000, len = 0x9A00 } @@ -31,13 +31,14 @@ SECTIONS *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_flash_config_esp32s3.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*) - *libhal.a:bootloader_init_common.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) - *libhal.a:bootloader_efuse_esp32s3.*(.literal .text .literal.* .text.*) + *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*) @@ -52,11 +53,17 @@ SECTIONS *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*) *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*) - *libhal.a:esp_efuse_api_key_esp32xx.*(.literal .text .literal.* .text.*) + *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*) + *libhal.a:rtc_time.*(.literal .text .literal.* .text.*) + *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) *libhal.a:app_cpu_start.*(.literal .text .literal.* .text.*) *esp_mcuboot.*(.literal .text .literal.* .text.*) *esp_loader.*(.literal .text .literal.* .text.*) diff --git a/boot/espressif/port/esp32s3/serial_adapter.c b/boot/espressif/port/esp32s3/serial_adapter.c index 4976bdc1..7b244a63 100644 --- a/boot/espressif/port/esp32s3/serial_adapter.c +++ b/boot/espressif/port/esp32s3/serial_adapter.c @@ -172,7 +172,7 @@ int boot_console_init(void) uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); uart_ll_set_mode_normal(serial_boot_uart_dev); - uart_ll_set_baudrate(serial_boot_uart_dev, 115200); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); uart_ll_set_rx_tout(serial_boot_uart_dev, 16); diff --git a/boot/espressif/port/esp_loader.c b/boot/espressif/port/esp_loader.c index abb9fdc3..04d92c6c 100644 --- a/boot/espressif/port/esp_loader.c +++ b/boot/espressif/port/esp_loader.c @@ -9,19 +9,11 @@ #include #include +#include "bootloader_memory_utils.h" #include "bootloader_flash_priv.h" #include "esp_flash_encrypt.h" -#include "soc/soc_memory_layout.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/uart.h" -#endif +#include "rom/uart.h" #include "esp_mcuboot_image.h" #include "esp_loader.h" diff --git a/boot/espressif/port/esp_mcuboot.c b/boot/espressif/port/esp_mcuboot.c index ea0661fd..0ee9e388 100644 --- a/boot/espressif/port/esp_mcuboot.c +++ b/boot/espressif/port/esp_mcuboot.c @@ -212,7 +212,11 @@ int flash_area_read(const struct flash_area *fa, uint32_t off, void *dst, static bool aligned_flash_write(size_t dest_addr, const void *src, size_t size) { - bool flash_encryption_enabled = esp_flash_encryption_enabled(); +#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED + bool flash_encryption_enabled = esp_flash_encryption_enabled(); +#else + bool flash_encryption_enabled = false; +#endif if (IS_ALIGNED(dest_addr, 4) && IS_ALIGNED((uintptr_t)src, 4) && IS_ALIGNED(size, 4)) { /* A single write operation is enough when all parameters are aligned */ @@ -327,7 +331,11 @@ uint32_t flash_area_align(const struct flash_area *area) static size_t align = 0; if (align == 0) { +#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED bool flash_encryption_enabled = esp_flash_encryption_enabled(); +#else + bool flash_encryption_enabled = false; +#endif if (flash_encryption_enabled) { align = 32; diff --git a/boot/espressif/tools/toolchain-esp32.cmake b/boot/espressif/tools/toolchain-esp32.cmake index 5c9c535b..88f6ea36 100644 --- a/boot/espressif/tools/toolchain-esp32.cmake +++ b/boot/espressif/tools/toolchain-esp32.cmake @@ -3,8 +3,10 @@ set(CMAKE_SYSTEM_NAME Generic) set(CMAKE_C_COMPILER xtensa-esp32-elf-gcc) set(CMAKE_CXX_COMPILER xtensa-esp32-elf-g++) set(CMAKE_ASM_COMPILER xtensa-esp32-elf-gcc) +set(_CMAKE_TOOLCHAIN_PREFIX xtensa-esp32-elf-) -set(CMAKE_C_FLAGS "-mlongcalls -Wno-frame-address" CACHE STRING "C Compiler Base Flags") -set(CMAKE_CXX_FLAGS "-mlongcalls -Wno-frame-address" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_C_FLAGS "${UNIQ_CMAKE_C_FLAGS}" CACHE STRING "C Compiler Base Flags" FORCE) +set(CMAKE_CXX_FLAGS "${UNIQ_CMAKE_CXX_FLAGS}" CACHE STRING "C++ Compiler Base Flags" FORCE) +set(CMAKE_ASM_FLAGS "${UNIQ_CMAKE_ASM_FLAGS}" CACHE STRING "ASM Compiler Base Flags" FORCE) set(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections" CACHE STRING "Linker Base Flags") diff --git a/boot/espressif/tools/toolchain-esp32c3.cmake b/boot/espressif/tools/toolchain-esp32c3.cmake index cd30a2ae..5493620e 100644 --- a/boot/espressif/tools/toolchain-esp32c3.cmake +++ b/boot/espressif/tools/toolchain-esp32c3.cmake @@ -4,6 +4,6 @@ set(CMAKE_C_COMPILER riscv32-esp-elf-gcc) set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++) set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc) -set(CMAKE_C_FLAGS "-march=rv32imc" CACHE STRING "C Compiler Base Flags") -set(CMAKE_CXX_FLAGS "-march=rv32imc" CACHE STRING "C++ Compiler Base Flags") -set(CMAKE_EXE_LINKER_FLAGS "-nostartfiles -march=rv32imc --specs=nosys.specs" CACHE STRING "Linker Base Flags") +set(CMAKE_C_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C Compiler Base Flags") +set(CMAKE_CXX_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_EXE_LINKER_FLAGS "-nostartfiles -march=rv32imc_zicsr_zifencei --specs=nosys.specs" CACHE STRING "Linker Base Flags") diff --git a/boot/espressif/tools/toolchain-esp32s3.cmake b/boot/espressif/tools/toolchain-esp32s3.cmake index 43bb918e..de3e3da0 100644 --- a/boot/espressif/tools/toolchain-esp32s3.cmake +++ b/boot/espressif/tools/toolchain-esp32s3.cmake @@ -7,8 +7,10 @@ set(CMAKE_SYSTEM_NAME Generic) set(CMAKE_C_COMPILER xtensa-esp32s3-elf-gcc) set(CMAKE_CXX_COMPILER xtensa-esp32s3-elf-g++) set(CMAKE_ASM_COMPILER xtensa-esp32s3-elf-gcc) +set(_CMAKE_TOOLCHAIN_PREFIX xtensa-esp32s3-elf-) -set(CMAKE_C_FLAGS "-mlongcalls" CACHE STRING "C Compiler Base Flags") -set(CMAKE_CXX_FLAGS "-mlongcalls" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_C_FLAGS "-mlongcalls" CACHE STRING "C Compiler Base Flags" FORCE) +set(CMAKE_CXX_FLAGS "-mlongcalls" CACHE STRING "C++ Compiler Base Flags" FORCE) +set(CMAKE_ASM_FLAGS "${UNIQ_CMAKE_ASM_FLAGS}" CACHE STRING "ASM Compiler Base Flags" FORCE) set(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections" CACHE STRING "Linker Base Flags")