97 lines
4.5 KiB
Plaintext
97 lines
4.5 KiB
Plaintext
/**
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@page CRC_Example Cyclic Redundancy Check Example
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@verbatim
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******************************************************************************
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* @file CRC/CRC_Example/readme.txt
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* @author MCD Application Team
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* @brief Description of Cyclic Redundancy Check Example.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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How to configure the CRC using the HAL API. The CRC (cyclic
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redundancy check) calculation unit computes the CRC code of a given buffer of
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32-bit data words, using a fixed generator polynomial (0x4C11DB7).
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At the beginning of the main program the HAL_Init() function is called to reset
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all the peripherals, initialize the Flash interface and the systick.
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Then the SystemClock_Config() function is used to configure the system
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clock (SYSCLK) to run at 216 MHz.
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The CRC peripheral configuration is ensured by HAL_CRC_Init() function.
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The latter is calling HAL_CRC_MspInit() function which core is implementing
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the configuration of the needed CRC resources according to the used hardware (CLOCK).
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You can update HAL_CRC_Init() input parameters to change the CRC configuration.
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The calculated CRC code is stored in uwCRCValue variable
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and compared with the expected one stored in uwExpectedCRCValue variable.
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NUCLEO-F746ZG Rev.B board LEDs is used to monitor the example status:
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- LED1 is ON when a correct CRC value is calculated
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- LED1 is slowly blinking (1 sec. period) when an incorrect CRC value is calculated or when there is an initialization error.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Keywords
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Security, CRC, CRC Polynomial, IEC 60870-5, hardware CRC,
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@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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<20><><EFBFBD><EFBFBD><EFBFBD>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Even though the user must manage the cache coherence for read accesses.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
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@par Directory contents
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- CRC/CRC_Example/Inc/stm32f7xx_hal_conf.h HAL configuration file
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- CRC/CRC_Example/Inc/stm32f7xx_it.h Interrupt handlers header file
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- CRC/CRC_Example/Inc/main.h Header for main.c module
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- CRC/CRC_Example/Src/stm32f7xx_it.c Interrupt handlers
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- CRC/CRC_Example/Src/main.c Main program
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- CRC/CRC_Example/Src/stm32f7xx_hal_msp.c HAL MSP module
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- CRC/CRC_Example/Src/system_stm32f7xx.c STM32F7xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F746ZG devices.
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- This example has been tested with an STMicroelectronics NUCLEO-F746ZG Rev.B
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board and can be easily tailored to any other supported device
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and development board.
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@par How to use it ?
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In order to make the program work, you must do the following:
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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