123 lines
6.0 KiB
Plaintext
123 lines
6.0 KiB
Plaintext
/**
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@page FatFs_RAMDisk_RTOS FatFs with RAM disk drive in RTOS mode application
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@verbatim
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******************************************************************************
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* @file FatFs/FatFs_RAMDisk_RTOS/readme.txt
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* @author MCD Application Team
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* @brief Description of the FatFs with RAM disk drive in RTOS mode application
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Application Description
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How to use STM32Cube firmware with FatFs middleware component as a generic FAT
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file system module. This example develops an application exploiting FatFs
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features, with a RAM disk (SRAM) drive in RTOS mode configuration.
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At the beginning of the main program the HAL_Init() function is called to reset
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all the peripherals, initialize the Flash interface and the systick.
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Then the SystemClock_Config() function is used to configure the system clock
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(SYSCLK) to run at 216 MHz.
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The application is based on writing and reading back a text file from a drive,
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it creates a normal priority thread and it's performed using FatFs APIs to
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access the FAT volume as described in the following steps:
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- Link the SDRAM disk I/O driver;
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- Register the file system object (mount) to the FatFs module for the SDRAM drive;
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- Create a FAT file system (format) on the SDRAM drive;
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- Create and Open new text file object with write access;
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- Write data to the text file;
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- Close the open text file;
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- Open text file object with read access;
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- Read back data from the text file;
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- Close the open text file;
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- Check on read data from text file;
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- Unlink the SDRAM disk I/O driver.
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It is worth noting that the application manages any error occurred during the
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access to FAT volume, when using FatFs APIs.
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It is possible to fine tune needed FatFs features by modifying defines values
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in FatFs configuration file <20>ffconf.h<> available under the project includes
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directory, in a way to fit the application requirements.
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STM32 Eval board's LEDs can be used to monitor the application status:
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- LED1 is ON when the application runs successfully.
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- LED3 is ON when any error occurs.
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@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
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OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in HAL time base ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the HAL time base interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application needs to ensure that the HAL time base is always set to 1 millisecond
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to have correct HAL operation.
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For more details about FatFs implementation on STM32Cube, please refer to UM1721 "Developing Applications
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on STM32Cube with FatFs".
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@par Keywords
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FatFS, RAMDisk, SRAM, FAT, File system, Mount, Format, FreeRTOS, RTOS
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@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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<20><><EFBFBD><EFBFBD><EFBFBD>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Even though the user must manage the cache coherence for read accesses.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
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@par Directory contents
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- FatFs/FatFs_RAMDisk_RTOS/Inc/stm32f7xx_hal_conf.h HAL configuration file
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- FatFs/FatFs_RAMDisk_RTOS/Inc/stm32f7xx_it.h Interrupt handlers header file
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- FatFs/FatFs_RAMDisk_RTOS/Inc/main.h Main program header file
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- FatFs/FatFs_RAMDisk_RTOS/Inc/ffconf.h FAT file system module configuration file
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- FatFs/FatFs_RAMDisk_RTOS/Inc/sram_diskio.h SRAM diskio header file
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- FatFs/FatFs_RAMDisk_RTOS/Inc/FreeRTOSConfig.h FreeRTOS distribution file
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- FatFs/FatFs_RAMDisk_RTOS/Src/stm32f7xx_hal_timebase_tim.c HAL time base functions
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- FatFs/FatFs_RAMDisk_RTOS/Src/stm32f7xx_it.c Interrupt handlers
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- FatFs/FatFs_RAMDisk_RTOS/Src/main.c Main program
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- FatFs/FatFs_RAMDisk_RTOS/Src/system_stm32f7xx.c STM32F7xx system clock configuration file
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- FatFs/FatFs_RAMDisk_RTOS/Src/sram_diskio.c SRAM diskio source file
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@par Hardware and Software environment
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- This application runs on STM32F767xx/STM32F769xx/STM32F777xx/STM32F779xx devices.
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- This application has been tested with STMicroelectronics STM32769I_EVAL
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evaluation boards and can be easily tailored to any other supported device
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and development board.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the application
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*/ |