This file contains invisible Unicode characters that are indistinguishable to humans but may be processed differently by a computer. If you think that this is intentional, you can safely ignore this warning. Use the Escape button to reveal them.
/**
@page RTC_Tamper RTC example
@verbatim
******************************************************************************
* @file Examples_LL/RTC/RTC_Tamper/readme.txt
* @author MCD Application Team
* @brief Description of the RTC example.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@endverbatim
@NoteIf the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
Even though the user must manage the cache coherence for read accesses.
Please refer to the AN4838 “Managing memory protection unit (MPU) in STM32 MCUs”
Please refer to the AN4839 “Level 1 cache on STM32F7 Series”
@par Example Description
Configuration of the Tamper using the RTC LL API. The peripheral initialization
uses LL unitary service functions for optimization purposes (performance and size).
In this example, after start-up, SYSCLK is configured to the max frequency using the PLL with
HSE as clock source.
The RTC peripheral configuration is ensured by the Configure_RTC() function
(configure of the needed RTC resources according to the used hardware CLOCK,
PWR, RTC clock source and BackUp). You may update this function to change RTC configuration.
The associated firmware performs the following:
1. It configures the Tamper pin to be falling edge, and enables the Tamper
interrupt.
2. It writes the data to all RTC Backup data registers, then check whether the
data were correctly written. If yes, LED1 toggles with a fast period,
otherwise LED1 toggles with a period of 1s.
3. Applying a low level on the USER_BUTTON_PIN (PC.13) by pressing User push-button,
the RTC backup data registers are reset and the Tamper interrupt is generated.
The corresponding ISR then checks whether the RTC Backup data registers are cleared.
If yes LED1 turns on, otherwise LED1 toggles with a period of 1s.
@par Keywords
System, RTC, Tamper, Reset, LSE, LSI
@par Directory contents
- RTC/RTC_Tamper/Inc/stm32f7xx_it.h Interrupt handlers header file
- RTC/RTC_Tamper/Inc/main.h Header for main.c module
- RTC/RTC_Tamper/Inc/stm32_assert.h Template file to include assert_failed function
- RTC/RTC_Tamper/Src/stm32f7xx_it.c Interrupt handlers
- RTC/RTC_Tamper/Src/main.c Main program
- RTC/RTC_Tamper/Src/system_stm32f7xx.c STM32F7xx system source file
@par Hardware and Software environment
- This example runs on STM32F767xx devices.
- This example has been tested with NUCLEO-F767ZI board and can be
easily tailored to any other supported device and development board.
@par How to use it ?
In order to make the program work, you must do the following :
- Open your preferred toolchain
- Rebuild all files and load your image into target memory
- Run the example
*/
f8bda023e3