/**
@page TIM_TimeBase Time Base example
@verbatim
******************************************************************************
* @file TIM/TIM_TimeBase/readme.txt
* @author MCD Application Team
* @brief Description of the TIM Time Base example
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
@endverbatim
@par Example Description
Configuration of the TIM peripheral to generate a timebase of
one second with the corresponding interrupt request.
In this example, the code is executed from QSPI external memory while data are in internal
SRAM memory.
In this example TIM3 input clock (TIM3CLK) is set to APB1 clock (PCLK1) x2,
since APB1 prescaler is equal to 4.
TIM3CLK = PCLK1*2
PCLK1 = HCLK/4
=> TIM3CLK = HCLK/2 = SystemCoreClock/2
To get TIM3 counter clock at 10 KHz, the Prescaler is computed as follows:
Prescaler = (TIM3CLK / TIM3 counter clock) - 1
Prescaler = ((SystemCoreClock/2) /10 KHz) - 1
SystemCoreClock is set to 216 MHz for STM32F7xx Devices.
The TIM3 ARR register value is equal to 10000 - 1,
Update rate = TIM3 counter clock / (Period + 1) = 1 Hz,
So the TIM3 generates an interrupt each 1 s
When the counter value reaches the auto-reload register value, the TIM update
interrupt is generated and, in the handler routine, pin PB1 (connected to LED6 on board STM32F7308-DISCO)
is toggled at the following frequency: 0.5Hz.
In case of error, LED5 is turned ON.
@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
@note The application need to ensure that the SysTick time base is always set to 1 millisecond
to have correct HAL operation.
@par Keywords
Timer, TIM, Time Base, Interrupt, Clock source
@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
<20><><A0><A0><A0>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
<0A><><A0><A0><A0><A0>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
<0A><><A0><A0><A0> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
<0A><><A0><A0><A0><A0>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
<0A><><A0><A0><A0><A0>Even though the user must manage the cache coherence for read accesses.
<0A><><A0><A0><A0><A0>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
<0A><><A0><A0><A0><A0>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
@par Directory contents
- TIM/TIM_TimeBase/Inc/stm32f7xx_hal_conf.h HAL configuration file
- TIM/TIM_TimeBase/Inc/stm32f7xx_it.h Interrupt handlers header file
- TIM/TIM_TimeBase/Inc/main.h Header for main.c module
- TIM/TIM_TimeBase/Src/stm32f7xx_it.c Interrupt handlers
- TIM/TIM_TimeBase/Src/main.c Main program
- TIM/TIM_TimeBase/Src/stm32f7xx_hal_msp.c HAL MSP file
- TIM/TIM_TimeBase/Src/system_stm32f7xx.c STM32F7xx system source file
@par Hardware and Software environment
- This example runs on STM32F730xx devices.
- In this example, the clock is set to 216 MHz.
- This example has been tested with STMicroelectronics STM32F7308-DISCO
board and can be easily tailored to any other supported device
and development board.
- STM32F7308-DISCO Set-up
- Use LED6 connected to PB1 pin (LED6) and connect it on an oscilloscope
to show the Time Base signal.
@par How to use it ?
In order to make the program work, you must do the following:
1. Select required configuration in memory.h in Templates\ExtMem_Boot\Inc.
The default configuration is the right one:
- DATA_AREA set to USE_INTERNAL_SRAM
- CODE_AREA set to USE_QSPI
2. Program the internal Flash with the ExtMem_Boot (see below).
3. Program the external memory with this example (see below).
4. Start debugging user example or reset for free running.
In order to load the ExtMem_Boot code :
- Open your preferred toolchain :
- Open the Project
- Rebuild all files
- Load project image
In order to load this example to the external memory :
- Open your preferred toolchain
- Rebuild all files.
- Run & debug the program:
- Using EWARM or MDK-ARM : Load project image from the IDE: Project->Debug
- Using SW4STM32 :
- Open the STM32CubeProgrammer tool
- Select the QSPI external flash loader "MX25L512G_STM32F7308-DISCO"
- From Erasing & Programming menu, browse and open the output binary file relative to this example
- Load the file into the external QSPI flash using "Start Programming" at the address APPLICATION_ADDRESS (0x90000000)
- Run & debug the program:
* <h3><center>© COPYRIGHT STMicroelectronics</center></h3>
*/
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