123 lines
5.9 KiB
Plaintext
123 lines
5.9 KiB
Plaintext
/**
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@page CRYP_AESGCM AES GCM Example
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@verbatim
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******************************************************************************
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* @file CRYP/CRYP_AESGCM/readme.txt
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* @author MCD Application Team
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* @brief Description of the CRYP AES Galois/counter mode (GCM)encryption
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* decryption mode and TAG generation.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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How to use the CRYPTO peripheral to encrypt/decrypt data(Plaintext/Ciphertext) using
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AES Galois/counter mode (GCM)and generate the authentication TAG .
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At the beginning of the main program the HAL_Init() function is called to reset
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all the peripherals, initialize the Flash interface and the systick.
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The SystemClock_Config() function is used to configure the system clock for STM32F777xx/STM32F779xx Devices :
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The CPU at 216MHz
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The AES-GCM mode requires:
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1. Plaintext/Ciphertext: which will be authenticated and encrypted/decrypted. Its
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size must be a multiple of 4 words. if it's not, which is the case in this
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example, it must be padded either manually by user ( put input padded Size
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equal to 16 in this example)or automatically by the driver( in this case put
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real input Size here 15).
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in our example, the size is set to 15, so the padding is done by the driver.
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2. HeaderMessage: authenticated header (also knows as Additional Authentication Data AAD)
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this part of the message is only authenticated, not encrypted.
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HeaderSize is the size of header buffer in word. should be a multiple of 4 words.
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if it's not, which is the case in this example, it must be padded exactly like Plaintext.
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in our example, the headersize is set to 5, so the padding is done by the driver.
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3. InitVector or the Initial Counter Block (ICB)composed of IV and counter.
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4. Key: is the parameter which determines the cipher text. In this example the key
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size is 128 bits = 4 words but it can be tailored to 192 bits and 256 bits.
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CRYP peripheral must be initialized once from the beginning, then for each operation of
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encryption/decryption, only configuration should be made if needed.
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The AES-GCM encryption and TAG generation provides :
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1. Encryptedtext: which is the encryption result of Plaintext, it is compared to Ciphertext.
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2. TAG: the Message Authentication Code generated after the encryption and it's compared
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to ExpectedTAG.
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The AES-GCM decryption and TAG generation provides :
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1. Decryptedtext: which is the Decryption result of Ciphertext, it is compared to Plaintext.
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2. TAG: the Message Authentication Code generated after the encryption and it's compared
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to ExpectedTAG.
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STM32F779I_EVAL LEDs are used to monitor the encryption/decryption and TAG generation status:
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- LED1(GREEN) is ON when encryption/decryption and TAG generation is right.
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- LED3(RED) is ON when encryption or decryption or TAG generation is wrong.
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Keywords
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Security, CRYP, GCM , NIST Special Publication 800-38d, hardware CRYP,
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@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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<20><><EFBFBD><EFBFBD><EFBFBD>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> Even though the user must manage the cache coherence for read accesses.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
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@par Directory contents
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- CRYP/CRYP_AESGCM/Inc/stm32f7xx_hal_conf.h HAL configuration file
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- CRYP/CRYP_AESGCM/Inc/stm32f7xx_it.h Interrupt handlers header file
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- CRYP/CRYP_AESGCM/Inc/main.h Header for main.c module
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- CRYP/CRYP_AESGCM/Src/stm32f7xx_it.c Interrupt handlers
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- CRYP/CRYP_AESGCM/Src/main.c Main program
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- CRYP/CRYP_AESGCM/Src/stm32f7xx_hal_msp.c HAL MSP module
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- CRYP/CRYP_AESGCM/Src/system_stm32f7xx.c STM32F7xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F777xx/STM32F779xx devices.
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- This example has been tested with an STMicroelectronics STM32F779I_EVAL
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board and can be easily tailored to any other supported device
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and development board.
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@par How to use it ?
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In order to make the program work, you must do the following:
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/ |