[BSP] Replace 'BSP/Components/w25q128j' folder by a submodule

This commit is contained in:
Ali Labbene 2024-08-09 15:29:18 +01:00
parent 043a9bf774
commit b0c7e53233
8 changed files with 5 additions and 1978 deletions

4
.gitmodules vendored
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path = Drivers/BSP/Components/wm8994 path = Drivers/BSP/Components/wm8994
url = https://github.com/STMicroelectronics/stm32-wm8994.git url = https://github.com/STMicroelectronics/stm32-wm8994.git
branch = main branch = main
[submodule "Drivers/BSP/Components/w25q128j"]
path = Drivers/BSP/Components/w25q128j
url = https://github.com/STMicroelectronics/stm32-w25q128j.git
branch = main

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Subproject commit e58420b762161b8baa26d7bc1406ad4a79e9375b

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Copyright 2021 STMicroelectronics.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
<meta charset="utf-8" />
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for W25Q128J Component Driver</title>
<style>
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
span.underline{text-decoration: underline;}
div.column{display: inline-block; vertical-align: top; width: 50%;}
div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
ul.task-list{list-style: none;}
.display.math{display: block; text-align: center; margin: 0.5rem auto;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
<!--[if lt IE 9]>
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
<![endif]-->
<link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
</head>
<body>
<div class="row">
<div class="col-sm-12 col-lg-4">
<center>
<h1 id="release-notes-for">Release Notes for</h1>
<h1 id="w25q128j-quadspi-component-driver"><mark>W25Q128J QuadSPI Component Driver</mark></h1>
<p>Copyright © 2022 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>This driver provides a set of functions for W25Q128J QuadSPI component</p>
</div>
<section id="update-history" class="col-sm-12 col-lg-8">
<h1>Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section1" checked aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V1.0.0 / 19-October-2022</label>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>First official release of W25Q128J QuadSPI component driver</li>
</ul>
</div>
</section>
</div>
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> , visit: <a href="http://www.st.com/STM32">http://www.st.com/STM32</a>
</footer>
</body>
</html>

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/**
******************************************************************************
* @file w25q128j.h
* @author MCD Application Team
* @brief This file contains all the description of the W25Q128J QSPI memory.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef W25Q128J_H
#define W25Q128J_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup w25q128j
* @{
*/
/** @defgroup W25Q128J_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup W25Q128J_Exported_Constants
* @{
*/
/**
* @brief W25Q128J Configuration
*/
#define W25Q128J_FLASH_SIZE 0x1000000 /* 128 MBits => 16MBytes */
#define W25Q128J_BLOCK_SIZE 0x10000 /* 256 blocks of 64KBytes */
#define W25Q128J_SUBBLOCK_SIZE 0x8000 /* 512 blocks of 32 KBytes */
#define W25Q128J_SECTOR_SIZE 0x1000 /* 4096 sectors of 4kBytes */
#define W25Q128J_PAGE_SIZE 0x100 /* 65536 pages of 256 bytes */
#define W25Q128J_DUMMY_CYCLES_READ 8
#define W25Q128J_DUMMY_CYCLES_READ_QUAD 6
#define W25Q128J_CHIP_ERASE_MAX_TIME 200000
#define W25Q128J_BLOCK_ERASE_MAX_TIME 2000
#define W25Q128J_SUBBLOCK_ERASE_MAX_TIME 1600
#define W25Q128J_SECTOR_ERASE_MAX_TIME 400
/**
* @brief W25Q128J Commands
*/
/* Reset Operations */
#define RESET_ENABLE_CMD 0x66
#define RESET_MEMORY_CMD 0x99
/* Identification Operations */
#define READ_ID_CMD 0x90
#define READ_ID_DUAL_CMD 0x92
#define READ_ID_QUAD_CMD 0x94
#define READ_JEDEC_ID_CMD 0x9F
#define READ_UNIQUE_ID_CMD 0x4B
/* Read Operations */
#define READ_DATA_CMD 0x03
#define FAST_READ_CMD 0x0B
#define FAST_READ_DUAL_OUT_CMD 0x3B
#define FAST_READ_DUAL_INOUT_CMD 0xBB
#define FAST_READ_QUAD_OUT_CMD 0x6B
#define FAST_READ_QUAD_INOUT_CMD 0xEB
/* Write Operations */
#define WRITE_ENABLE_CMD 0x06
#define VOL_SR_WRITE_ENABLE_CMD 0x50
#define WRITE_DISABLE_CMD 0x04
/* Register Operations */
#define READ_STATUS_REG_CMD 0x05
#define READ_STATUS_REG_2_CMD 0x35
#define READ_STATUS_REG_3_CMD 0x15
#define WRITE_STATUS_REG_CMD 0x01
#define WRITE_STATUS_REG_2_CMD 0x31
#define WRITE_STATUS_REG_3_CMD 0x11
#define READ_SFDP_REG_CMD 0x5A
#define READ_BLOCK_SECTOR_LOCK 0x3D
#define ERASE_SECURITY_REG_CMD 0x44
#define PROG_SECURITY_REG_CMD 0x42
#define READ_SECURITY_REG_CMD 0x48
/* Program Operations */
#define PAGE_PROG_CMD 0x02
#define QUAD_PAGE_PROG_CMD 0x32
/* Erase Operations */
#define SECTOR_ERASE_CMD 0x20
#define BLOCK_ERASE_32K_CMD 0x52
#define BLOCK_ERASE_64K_CMD 0xD8
#define CHIP_ERASE_CMD 0xC7
#define CHIP_ERASE_CMD_1 0x60
#define ERASE_PROG_SUSPEND_CMD 0x75
#define ERASE_PROG_RESUME_CMD 0x7A
/* Power-down operations */
#define POWER_DOWN_CMD 0xB9
#define RELEASE_POWER_DOWN_CMD 0xAB
/* Other operations */
#define SET_BURST_WRAP_CMD 0x77
#define INDIV_BLOCK_SECTOR_LOCK 0x36
#define INDIV_BLOCK_SECTOR_UNLOCK 0x39
#define GLOBAL_BLOCK_SECTOR_LOCK 0x7E
#define GLOBAL_BLOCK_SECTOR_UNLOCK 0x98
/**
* @brief W25Q128J Registers
*/
/* Status Register 1 */
#define W25Q128J_SR_BUSY ((uint8_t)0x01) /*!< Erase/Write in progress */
#define W25Q128J_SR_WEL ((uint8_t)0x02) /*!< Write enable latch */
#define W25Q128J_SR_BP ((uint8_t)0x1C) /*!< Block protected bits */
#define W25Q128J_SR_TB ((uint8_t)0x20) /*!< Top/Bottom protect */
#define W25Q128J_SR_SEC ((uint8_t)0x40) /*!< Sector protect */
/* Status Register 2 */
#define W25Q128J_SR2_SRL ((uint8_t)0x01) /*!< Status Register Lock */
#define W25Q128J_SR2_QE ((uint8_t)0x02) /*!< Quad Enable */
#define W25Q128J_SR2_LB ((uint8_t)0x3C) /*!< Security Register Lock bits */
#define W25Q128J_SR2_CMP ((uint8_t)0x40) /*!< Complement protect */
#define W25Q128J_SR2_SUS ((uint8_t)0x80) /*!< Suspend Status */
/* Status Register 3 */
#define W25Q128J_SR3_WPS ((uint8_t)0x04) /*!< Write Protect Selection */
#define W25Q128J_SR3_DRV ((uint8_t)0x60) /*!< Output Driver Strength */
/**
* @}
*/
/** @defgroup W25Q128J_Exported_Functions
* @{
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* W25Q128J_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/