116 lines
5.6 KiB
Plaintext
116 lines
5.6 KiB
Plaintext
/**
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@page FMC_SDRAM_LowPower SDRAM memory low power mode use example
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@verbatim
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******************** (C) COPYRIGHT 2017 STMicroelectronics *******************
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* @file FMC/FMC_SDRAM_LowPower/readme.txt
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* @author MCD Application Team
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* @brief Description of the FMC SDRAM Low power example.
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******************************************************************************
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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This example describes how to configure the FMC controller to access the SDRAM
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memory in low power mode (SDRAM Self Refresh mode).
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This example guides you through the different configuration steps by mean of HAL API
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to drive the MT48LC4M32B2B5-7 SDRAM memory mounted on STM324x9I-EVAL RevB board, in
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low power mode (SDRAM Self Refresh mode).
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It gives a simple application of the FMC SDRAM low power mode use (self refresh mode)
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while the MCU is in a low power mode (STOP mode).
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At the beginning of the main program the HAL_Init() function is called to reset
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all the peripherals, initialize the Flash interface and the systick.
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Then the SystemClock_Config() function is used to configure the system
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clock (SYSCLK) to run at 180 MHz.
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The purpose is to show how the SDRAM can retain data written after entering STOP mode.
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STOP mode is a CPU low power mode which stops all peripherals clocks in the 1.2V
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domain. Only internal SRAM and registers content are preserved in this mode.
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After SDRAM initialization, the data is written to the memory and a "self refresh"
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command is sent to the SDRAM. The program waits for TAMPER/KEY button to be pushed
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to enter the CPU in STOP mode, the LED4 is then turned ON.
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The wake-up from STOP mode is done when pushing WAKEUP Button and the CPU returns
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to RUN mode. At this time, the system clock is reconfigured using the function
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SystemClock_Config().
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Finally, a "normal mode" command is send to SDRAM memory to exit self refresh mode.
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The data written to SDRAM is read back and checked.
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LEDs are used to indicate the system state as following:
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- LED4 ON: CPU enters STOP mode.
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- LED4 OFF: the CPU is in RUN mode.
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- LED1 ON: correct data transfer (PASS).
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- LED2 ON: incorrect data transfer (FAIL).
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@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
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based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
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a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Keywords
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Memory, FMC, SDRAM, Read, Write, Initialization, Access, Low power, Self Refresh, Stop mode
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@par Directory contents
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- FMC/FMC_SDRAM_LowPower/Inc/stm32f4xx_hal_conf.h Library Configuration file
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- FMC/FMC_SDRAM_LowPower/Inc/stm32f4xx_it.h Interrupt handlers header file
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- FMC/FMC_SDRAM_LowPower/Inc/main.h Main program header file
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- FMC/FMC_SDRAM_LowPower/Src/main.c Main program
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- FMC/FMC_SDRAM_LowPower/Src/stm32f4xx_it.c Interrupt handlers
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- FMC/FMC_SDRAM_LowPower/Src/system_stm32f4xx.c STM32F4xx system clock configuration file
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@par Hardware and Software environment
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- This example runs on STM32F429xx/STM32F439xx devices.
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- This example has been tested with STMicroelectronics STM324x9I-EVAL RevB
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evaluation boards and can be easily tailored to any other supported device
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and development board.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred toolchain
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- Rebuild all files and load your image into target memory
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- Run the example
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* <h3><center>© COPYRIGHT STMicroelectronics</center></h3>
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*/
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