Add support for running SYSCLK from PLL1, via PLL2.
For parts like the STM32F1 Connectivity Line (STM32F105xx, STM32F107xx), it is occasionally necessary to source SYSCLK via PLL2. This patch will add this support. - Add: `UTILS_GetPLL2OutputFrequency()` to calculate the output frequency of PLL2 - Add: `LL_PLL_ConfigSystemClock_PLL2()` to configure the system clock as sourced from HSE, via PLL2 and PLL1. - Add: Miscellaneous support definitions. Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
This commit is contained in:
Attie Grande
Ali LABBENE
parent
276c4ab953
commit
f5aaa9b454
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@ -243,6 +243,12 @@ ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitS
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LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
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ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
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LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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#if defined(RCC_PLL2_SUPPORT)
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ErrorStatus LL_PLL_ConfigSystemClock_PLL2(uint32_t HSEFrequency, uint32_t HSEBypass,
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LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
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LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct,
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LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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#endif /* RCC_PLL2_SUPPORT */
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/**
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/**
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* @}
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* @}
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@ -126,6 +126,28 @@
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#define IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) ((__VALUE__) <= UTILS_PLL_OUTPUT_MAX)
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#define IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) ((__VALUE__) <= UTILS_PLL_OUTPUT_MAX)
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#if defined(RCC_PLL2_SUPPORT)
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#define IS_LL_UTILS_PLL2MUL_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL2_MUL_8) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_9) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_10) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_11) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_12) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_13) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_14) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_16) \
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|| ((__VALUE__) == LL_RCC_PLL2_MUL_20))
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#define IS_LL_UTILS_PREDIV2_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_1) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_2) || \
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((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_3) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_4) || \
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((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_5) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_6) || \
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((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_7) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_8) || \
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((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_9) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_10) || \
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((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_11) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_12) || \
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((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_13) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_14) || \
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((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_15) || ((__VALUE__) == LL_RCC_HSE_PREDIV2_DIV_16))
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#define IS_LL_UTILS_PLL2_FREQUENCY(__VALUE__) ((__VALUE__) <= UTILS_PLL_OUTPUT_MAX)
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#endif /* RCC_PLL2_SUPPORT */
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#define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \
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#define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \
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|| ((__STATE__) == LL_UTILS_HSEBYPASS_OFF))
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|| ((__STATE__) == LL_UTILS_HSEBYPASS_OFF))
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@ -140,6 +162,10 @@
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*/
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*/
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static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency,
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static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency,
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LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct);
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LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct);
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#if defined(RCC_PLL2_SUPPORT)
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static uint32_t UTILS_GetPLL2OutputFrequency(uint32_t PLL2_InputFrequency,
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LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct);
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#endif /* RCC_PLL2_SUPPORT */
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static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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static ErrorStatus UTILS_PLL_IsBusy(void);
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static ErrorStatus UTILS_PLL_IsBusy(void);
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/**
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/**
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@ -450,6 +476,90 @@ ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypa
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return status;
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return status;
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}
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}
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#if defined(RCC_PLL2_SUPPORT)
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/**
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* @brief This function configures system clock with HSE as clock source of the PLL, via PLL2
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* @note The application need to ensure that PLL and PLL2 are disabled.
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* @note Function is based on the following formula:
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* - PLL output frequency = ((((HSI frequency / PREDIV2) * PLL2MUL) / PREDIV) * PLLMUL)
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* - PREDIV, PLLMUL, PREDIV2, PLL2MUL: The application software must set correctly the
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* PLL multiplication factor to not exceed @ref UTILS_PLL_OUTPUT_MAX
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* @note FLASH latency can be modified through this function.
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* @param HSEFrequency Value between Min_Data = RCC_HSE_MIN and Max_Data = RCC_HSE_MAX
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* @param HSEBypass This parameter can be one of the following values:
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* @arg @ref LL_UTILS_HSEBYPASS_ON
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* @arg @ref LL_UTILS_HSEBYPASS_OFF
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* @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
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* the configuration information for the PLL.
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* @param UTILS_PLL2InitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
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* the configuration information for the PLL2.
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* @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
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* the configuration information for the BUS prescalers.
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: Max frequency configuration done
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* - ERROR: Max frequency configuration not done
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*/
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ErrorStatus LL_PLL_ConfigSystemClock_PLL2(uint32_t HSEFrequency, uint32_t HSEBypass,
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LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
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LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct,
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LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
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{
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ErrorStatus status = SUCCESS;
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uint32_t pllfreq = 0U;
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uint32_t pll2freq = 0U;
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/* Check the parameters */
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assert_param(IS_LL_UTILS_HSE_FREQUENCY(HSEFrequency));
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assert_param(IS_LL_UTILS_HSE_BYPASS(HSEBypass));
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/* Check if one of the PLL is enabled */
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if (UTILS_PLL_IsBusy() == SUCCESS)
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{
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assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->Prediv));
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assert_param(IS_LL_UTILS_PREDIV2_VALUE(UTILS_PLL2InitStruct->Prediv));
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/* Calculate the new PLL output frequency */
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pll2freq = UTILS_GetPLL2OutputFrequency(HSEFrequency, UTILS_PLL2InitStruct);
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pllfreq = UTILS_GetPLLOutputFrequency(pll2freq, UTILS_PLLInitStruct);
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/* Enable HSE if not enabled */
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if (LL_RCC_HSE_IsReady() != 1U)
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{
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/* Check if need to enable HSE bypass feature or not */
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if (HSEBypass == LL_UTILS_HSEBYPASS_ON)
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{
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LL_RCC_HSE_EnableBypass();
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}
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else
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{
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LL_RCC_HSE_DisableBypass();
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}
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/* Enable HSE */
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LL_RCC_HSE_Enable();
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while (LL_RCC_HSE_IsReady() != 1U)
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{
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/* Wait for HSE ready */
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}
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}
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/* configure PLLs */
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LL_RCC_PLL_ConfigDomain_PLL2(UTILS_PLL2InitStruct->Prediv, UTILS_PLL2InitStruct->PLLMul);
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LL_RCC_PLL_ConfigDomain_SYS(((RCC_CFGR2_PREDIV1SRC << 4U) | RCC_CFGR_PLLSRC | UTILS_PLLInitStruct->Prediv), UTILS_PLLInitStruct->PLLMul);
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/* Enable PLL and switch system clock to PLL */
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status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
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}
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else
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{
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/* Current PLL configuration cannot be modified */
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status = ERROR;
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}
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return status;
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}
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#endif /* RCC_PLL2_SUPPORT */
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/**
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/**
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* @}
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* @}
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*/
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*/
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@ -486,6 +596,29 @@ static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, LL_UTIL
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return pllfreq;
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return pllfreq;
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}
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}
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#if defined(RCC_PLL2_SUPPORT)
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/**
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* @brief Function to check that PLL2 can be modified
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* @param PLL2_InputFrequency PLL2 input frequency (in Hz)
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* @param UTILS_PLL2InitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
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* the configuration information for the PLL.
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* @retval PLL2 output frequency (in Hz)
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*/
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static uint32_t UTILS_GetPLL2OutputFrequency(uint32_t PLL2_InputFrequency, LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct)
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{
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uint32_t pll2freq = 0U;
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/* Check the parameters */
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assert_param(IS_LL_UTILS_PLL2MUL_VALUE(UTILS_PLL2InitStruct->PLLMul));
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/* Check different PLL parameters according to RM */
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pll2freq = __LL_RCC_CALC_PLL2CLK_FREQ(PLL2_InputFrequency, UTILS_PLL2InitStruct->PLLMul, UTILS_PLL2InitStruct->Prediv);
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assert_param(IS_LL_UTILS_PLL2_FREQUENCY(pll2freq));
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return pll2freq;
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}
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#endif /* RCC_PLL2_SUPPORT */
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/**
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/**
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* @brief Function to check that PLL can be modified
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* @brief Function to check that PLL can be modified
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* @retval An ErrorStatus enumeration value:
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* @retval An ErrorStatus enumeration value:
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