41 lines
1.5 KiB
C
41 lines
1.5 KiB
C
/****************************************************************************
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* arch/risc-v/include/barriers.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_INCLUDE_BARRIERS_H
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#define __ARCH_RISCV_INCLUDE_BARRIERS_H
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/* Common memory barriers (p=predecessor, s=successor) */
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#define __FENCE(p, s) __asm__ __volatile__ ("fence "#p", "#s ::: "memory")
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/* __DMB() is used to flush local data caches (memory) */
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#define __DMB() __FENCE(rw, rw)
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/* __MB() is a full memory barrier */
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#define __MB() __FENCE(iorw, iorw)
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/* __ISB() is used to synchronize the instruction and data streams */
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#define __ISB() __asm__ __volatile__ ("fence.i" ::: "memory")
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#endif /* __ARCH_RISCV_INCLUDE_BARRIERS_H */
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