496 lines
13 KiB
C
496 lines
13 KiB
C
/****************************************************************************
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* drivers/pci/pci_ecam.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <errno.h>
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#include <nuttx/arch.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/lib/math32.h>
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#include <nuttx/pci/pci.h>
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#include <nuttx/pci/pci_ecam.h>
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#include <nuttx/nuttx.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define readb(a) (*(FAR volatile uint8_t *)(a))
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#define writeb(v,a) (*(FAR volatile uint8_t *)(a) = (v))
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#define readw(a) (*(FAR volatile uint16_t *)(a))
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#define writew(v,a) (*(FAR volatile uint16_t *)(a) = (v))
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#define readl(a) (*(FAR volatile uint32_t *)(a))
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#define writel(v,a) (*(FAR volatile uint32_t *)(a) = (v))
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int pci_ecam_read_config(FAR struct pci_bus_s *bus,
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uint32_t devfn, int where, int size,
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FAR uint32_t *val);
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static int pci_ecam_write_config(FAR struct pci_bus_s *bus,
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uint32_t devfn, int where, int size,
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uint32_t val);
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static int pci_ecam_read_io(FAR struct pci_bus_s *bus, uintptr_t addr,
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int size, FAR uint32_t *val);
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static int pci_ecam_write_io(FAR struct pci_bus_s *bus, uintptr_t addr,
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int size, uint32_t val);
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static int pci_ecam_get_irq(FAR struct pci_bus_s *bus, uint32_t devfn,
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uint8_t line, uint8_t pin);
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#ifdef CONFIG_PCI_MSIX
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static int pci_ecam_alloc_irq(FAR struct pci_bus_s *bus, uint32_t devfn,
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FAR int *irq, int num);
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static void pci_ecam_release_irq(FAR struct pci_bus_s *bus, FAR int *irq,
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int num);
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static int pci_ecam_connect_irq(FAR struct pci_bus_s *bus, FAR int *irq,
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int num, FAR uintptr_t *mar,
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FAR uint32_t *mdr);
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct pci_ecam_s
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{
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struct pci_controller_s ctrl;
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struct pci_resource_s cfg;
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct pci_ops_s g_pci_ecam_ops =
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{
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.read = pci_ecam_read_config,
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.write = pci_ecam_write_config,
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.read_io = pci_ecam_read_io,
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.write_io = pci_ecam_write_io,
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.get_irq = pci_ecam_get_irq,
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#ifdef CONFIG_PCI_MSIX
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.alloc_irq = pci_ecam_alloc_irq,
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.release_irq = pci_ecam_release_irq,
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.connect_irq = pci_ecam_connect_irq,
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#endif
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: pci_ecam_from_controller
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*
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* Description:
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* To get the ecam type from ctrl type.
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*
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* Input Parameters:
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* ctrl - The pci controller
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*
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* Returned Value:
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* Return the struct pci_ecam_pcie s address
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*
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****************************************************************************/
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static inline FAR struct pci_ecam_s *
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pci_ecam_from_controller(FAR struct pci_controller_s *ctrl)
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{
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return container_of(ctrl, struct pci_ecam_s, ctrl);
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}
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/****************************************************************************
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* Name: pci_ecam_conf_address
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*
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* Description:
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* This function is used to get the specify reg address of a function
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* configuration space.
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*
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* Input Parameters:
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* bus - PCI bus type private data
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* devfn - Specify a BDF
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* where - Which ID in configuration space
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*
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****************************************************************************/
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static FAR void *pci_ecam_conf_address(FAR const struct pci_bus_s *bus,
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uint32_t devfn, int where)
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{
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FAR struct pci_ecam_s *ecam = pci_ecam_from_controller(bus->ctrl);
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FAR void *addr;
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addr = (FAR void *)ecam->cfg.start;
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addr += bus->number << 20;
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addr += PCI_SLOT(devfn) << 15;
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addr += PCI_FUNC(devfn) << 12;
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addr += where;
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return addr;
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}
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/****************************************************************************
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* Name: pci_ecam_addr_valid
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*
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* Description:
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* To check the bus number whether or not valid.
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*
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* Input Parameters:
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* bus - The bus private data
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* devfn - Get a specify dev by devfn
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*
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* Returned Value:
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* True if success, false if failed
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*
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****************************************************************************/
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static bool pci_ecam_addr_valid(FAR const struct pci_bus_s *bus,
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uint32_t devfn)
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{
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FAR struct pci_ecam_s *ecam = pci_ecam_from_controller(bus->ctrl);
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int num_buses = div_round_up(pci_resource_size(&ecam->cfg), 1 << 20);
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return bus->number < num_buses;
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}
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/****************************************************************************
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* Name: pci_ecam_read_config
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*
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* Description:
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* Read data from the speicfy register.
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*
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* Input Parameters:
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* bus - The bus on this to read reg data
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* devfn - BDF
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* where - Which cfg space ID
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* size - Data size
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* val - Return value to this var
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*
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* Returned Value:
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* Return the specify enum result of operation
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*
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****************************************************************************/
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static int pci_ecam_read_config(FAR struct pci_bus_s *bus,
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uint32_t devfn, int where, int size,
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FAR uint32_t *val)
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{
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FAR void *addr;
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if (!pci_ecam_addr_valid(bus, devfn))
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{
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return -ENODEV;
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}
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addr = pci_ecam_conf_address(bus, devfn, where);
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if (!IS_ALIGNED((uintptr_t)addr, size))
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{
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*val = 0;
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return -EINVAL;
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}
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if (size == 4)
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{
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*val = readl(addr);
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}
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else if (size == 2)
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{
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*val = readw(addr);
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}
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else if (size == 1)
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{
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*val = readb(addr);
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}
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else
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{
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*val = 0;
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return -EINVAL;
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}
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return OK;
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}
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/****************************************************************************
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* Name: pci_ecam_write_config
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*
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* Description:
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* Write data into speicfy register.
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*
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* Input Parameters:
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* bus - The specify bus private data
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* devfn - BDF
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* where - Which ID in configuration space
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* size - Data Size
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* val - The value to be written
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*
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* Returned Value:
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* Return the specify enum result of operation
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*
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****************************************************************************/
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static int pci_ecam_write_config(FAR struct pci_bus_s *bus,
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uint32_t devfn, int where, int size,
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uint32_t val)
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{
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FAR void *addr;
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if (!pci_ecam_addr_valid(bus, devfn))
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{
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return -ENODEV;
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}
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addr = pci_ecam_conf_address(bus, devfn, where);
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if (!IS_ALIGNED((uintptr_t)addr, size))
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{
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return -EINVAL;
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}
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if (size == 4)
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{
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writel(val, addr);
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}
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else if (size == 2)
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{
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writew(val, addr);
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}
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else if (size == 1)
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{
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writeb(val, addr);
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}
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else
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{
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return -EINVAL;
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}
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return OK;
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}
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/****************************************************************************
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* Name: pci_ecam_read_io
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*
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* Description:
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* Read data from the specific address.
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*
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* Input Parameters:
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* bus - The bus on this to read reg data
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* addr - Data address
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* size - Data size
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* val - Return value to this var
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*
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* Returned Value:
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* Zero (OK) is returned on success. A negated errno value is returned
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* on failure.
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*
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****************************************************************************/
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static int pci_ecam_read_io(FAR struct pci_bus_s *bus, uintptr_t addr,
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int size, FAR uint32_t *val)
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{
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if (!IS_ALIGNED(addr, size))
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{
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*val = 0;
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return -EINVAL;
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}
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if (size == 4)
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{
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*val = readl(addr);
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}
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else if (size == 2)
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{
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*val = readw(addr);
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}
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else if (size == 1)
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{
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*val = readb(addr);
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}
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else
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{
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*val = 0;
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return -EINVAL;
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}
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return OK;
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}
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/****************************************************************************
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* Name: pci_ecam_read_io
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*
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* Description:
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* Write data to the specific address.
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*
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* Input Parameters:
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* bus - The bus on this to read reg data
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* addr - Data address
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* size - Data size
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* val - Write this value to specific address
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*
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* Returned Value:
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* Zero (OK) is returned on success. A negated errno value is returned
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* on failure.
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*
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****************************************************************************/
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static int pci_ecam_write_io(FAR struct pci_bus_s *bus, uintptr_t addr,
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int size, uint32_t val)
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{
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if (!IS_ALIGNED(addr, size))
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{
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return -EINVAL;
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}
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if (size == 4)
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{
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writel(val, addr);
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}
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else if (size == 2)
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{
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writew(val, addr);
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}
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else if (size == 1)
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{
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writeb(val, addr);
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}
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else
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{
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return -EINVAL;
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}
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return OK;
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}
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#ifdef CONFIG_PCI_MSIX
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static int pci_ecam_alloc_irq(FAR struct pci_bus_s *bus, uint32_t devfn,
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FAR int *irq, int num)
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{
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return up_alloc_irq_msi(bus->ctrl->busno, devfn, irq, num);
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}
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static void pci_ecam_release_irq(FAR struct pci_bus_s *bus, FAR int *irq,
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int num)
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{
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return up_release_irq_msi(irq, num);
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}
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static int pci_ecam_connect_irq(FAR struct pci_bus_s *bus, FAR int *irq,
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int num, FAR uintptr_t *mar,
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FAR uint32_t *mdr)
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{
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return up_connect_irq(irq, num, mar, mdr);
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}
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#endif
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/****************************************************************************
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* Name: pci_ecam_get_irq
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*
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* Description:
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* Get interrupt number associated with a given INTx line.
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*
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* Input Parameters:
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* bus - Bus that PCI device resides
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* devfn - The pci device and function number
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* line - Activated PCI legacy interrupt line
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* pin - Intx pin number
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*
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* Returned Value:
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* Return interrupt number associated with a given INTx
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*
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****************************************************************************/
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static int pci_ecam_get_irq(FAR struct pci_bus_s *bus, uint32_t devfn,
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uint8_t line, uint8_t pin)
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{
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UNUSED(bus);
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return up_get_legacy_irq(devfn, line, pin);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: pci_ecam_register
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*
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* Description:
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* This function is used to register an ecam driver for pci.
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*
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* Input Parameters:
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* cfg - Configuration space data
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* io - I/O space data
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* mem - No-prefetchable space data
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* mem_pref - Prefetchable space data
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*
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* Returned Value:
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* Return 0 if success, nageative if failed
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*
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****************************************************************************/
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int pci_ecam_register(FAR const struct pci_resource_s *cfg,
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FAR const struct pci_resource_s *io,
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FAR const struct pci_resource_s *mem,
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FAR const struct pci_resource_s *mem_pref)
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{
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FAR struct pci_ecam_s *ecam;
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if (cfg == NULL || (io == NULL && mem == NULL && mem_pref == NULL))
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{
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return -EINVAL;
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}
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ecam = kmm_zalloc(sizeof(*ecam));
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if (ecam == NULL)
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{
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return -ENOMEM;
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}
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memcpy(&ecam->cfg, cfg, sizeof(*cfg));
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if (io != NULL)
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{
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memcpy(&ecam->ctrl.io, io, sizeof(*io));
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}
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if (mem != NULL)
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{
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memcpy(&ecam->ctrl.mem, mem, sizeof(*mem));
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}
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if (mem_pref != NULL)
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{
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memcpy(&ecam->ctrl.mem_pref, mem_pref, sizeof(*mem_pref));
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}
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ecam->ctrl.ops = &g_pci_ecam_ops;
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return pci_register_controller(&ecam->ctrl);
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}
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