299 lines
11 KiB
C
299 lines
11 KiB
C
/****************************************************************************
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* boards/arm/kinetis/freedom-k64f/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_KINETIS_FREEDOM_K64F_INCLUDE_BOARD_H
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#define __BOARDS_ARM_KINETIS_FREEDOM_K64F_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The Freedom K64F uses a 50MHz external clock from the Micrel Ethernet PHY.
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* The Kinetis MCU startup from an internal digitally-controlled oscillator
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* (DCO). NuttX will enable the main external oscillator (EXTAL0/XTAL0).
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* The external oscillator/resonator can range from 32.768 KHz up to 50 MHz.
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* The default external source for the MCG oscillator inputs (EXTAL) is
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* 50 MHz clock source from Micrel Ethernet PHY.
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*/
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#define BOARD_EXTCLOCK 1 /* External clock */
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#define BOARD_EXTAL_FREQ 50000000 /* 50MHz Oscillator from Micrel PHY */
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#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */
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/* PLL Configuration. Either the external clock or crystal frequency is used
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* to select the PRDIV value.
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* Only reference clock frequencies are supported that will produce
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* a KINETIS_MCG_PLL_REF_MIN >= PLLIN <= KINETIS_MCG_PLL_REF_MIN reference
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* clock to the PLL.
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*
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* PLL Input frequency: PLLIN = REFCLK / PRDIV = 50 MHz / 20 = 2.5 MHz
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* PLL Output frequency: PLLOUT = PLLIN * VDIV = 2.5 MHz * 48 = 120 MHz
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* MCG Frequency: PLLOUT = 120 MHz
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*
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* PRDIV register value is the divider minus KINETIS_MCG_C5_PRDIV_BASE.
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* VDIV register value is offset by KINETIS_MCG_C6_VDIV_BASE.
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*/
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#define BOARD_PRDIV 20 /* PLL External Reference Divider */
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#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */
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#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV)
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#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV)
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#define BOARD_MCG_FREQ BOARD_PLLOUT_FREQ
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/* Define additional MCG_C2 Setting */
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#define BOARD_MCG_C2_FCFTRIM 0 /* Do not enable FCFTRIM */
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#define BOARD_MCG_C2_LOCRE0 MCG_C2_LOCRE0 /* Enable reset on loss of clock */
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/* SIM CLKDIV1 dividers */
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#define BOARD_OUTDIV1 1 /* Core = MCG, 120 MHz */
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#define BOARD_OUTDIV2 2 /* Bus = MCG / 2, 60 MHz */
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#define BOARD_OUTDIV3 2 /* FlexBus = MCG / 2, 60 MHz */
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#define BOARD_OUTDIV4 5 /* Flash clock = MCG / 5, 24 MHz */
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#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1)
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#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2)
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#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
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#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
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/* Use BOARD_MCG_FREQ as the output SIM_SOPT2 MUX selected by
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* SIM_SOPT2[PLLFLLSEL]
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*/
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#define BOARD_SOPT2_PLLFLLSEL SIM_SOPT2_PLLFLLSEL_MCGPLLCLK
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#define BOARD_SOPT2_FREQ BOARD_MCG_FREQ
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/* Divider output clock = Divider input clock * ((USBFRAC+1) / (USBDIV+1))
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* SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ * ((USBFRAC+1) / (USBDIV+1))
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* SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ / (USBDIV+1)* (USBFRAC+1)
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* 48MHz = 120MHz / (4 + 1) * (1 + 1)
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*/
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#if (BOARD_SOPT2_FREQ == 120000000L)
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# define BOARD_SIM_CLKDIV2_USBFRAC 2
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# define BOARD_SIM_CLKDIV2_USBDIV 5
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# define BOARD_SIM_CLKDIV2_FREQ (BOARD_SOPT2_FREQ / \
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BOARD_SIM_CLKDIV2_USBDIV * \
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BOARD_SIM_CLKDIV2_USBFRAC)
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#endif
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/* SDHC clocking ************************************************************/
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/* SDCLK configurations corresponding to various modes of operation.
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* Formula is:
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*
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* SDCLK frequency = (base clock) / (prescaler * divisor)
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*
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* The SDHC module is always configure configured so that the core clock is
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* the base clock.
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* Possible values for presscaler and divisor are:
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*
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* SDCLKFS: {2, 4, 8, 16, 32, 63, 128, 256}
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* DVS: {1..16}
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*/
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/* Identification mode:
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* Optimal 400KHz, Actual 120MHz / (32 * 10) = 375 Khz
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*/
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#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV32
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#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(10)
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/* MMC normal mode:
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* Optimal 20MHz, Actual 120MHz / (2 * 3) = 20 MHz
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*/
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#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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/* SD normal mode (1-bit):
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* Optimal 20MHz, Actual 120MHz / (2 * 3) = 20 MHz
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*/
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#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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/* SD normal mode (4-bit):
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* Optimal 25MHz, Actual 120MHz / (2 * 3) = 20 MHz (with DMA)
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* SD normal mode (4-bit):
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* Optimal 20MHz, Actual 120MHz / (2 * 3) = 20 MHz (no DMA)
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*/
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#ifdef CONFIG_SDIO_DMA
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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#else
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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#endif
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/* Use the output of SIM_SOPT2[PLLFLLSEL] as the USB clock source */
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#define BOARD_USB_CLKSRC SIM_SOPT2_USBSRC
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#define BOARD_USB_FREQ BOARD_SIM_CLKDIV2_FREQ
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/* Allow USBOTG-FS Controller to Read from FLASH */
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#define BOARD_USB_FLASHACCESS
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/* PWM Configuration */
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/* FTM0 Channels */
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/* Channels can be modified using kinetis_k64pinmux.h */
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#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_1
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#define GPIO_FTM0_CH1OUT PIN_FTM0_CH1_1
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#define GPIO_FTM0_CH2OUT PIN_FTM0_CH2_2
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#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1
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#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_1
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#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_1
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/* LED definitions **********************************************************/
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/* The Freedom K64F has a single RGB LED driven by the K64F as follows:
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*
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* LED K64
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* ------ -------------------------------------------------------
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* RED PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
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* BLUE PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
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* GREEN PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs
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* in any way.
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* The following definitions are used to access individual LEDs.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED_R 0
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#define BOARD_LED_G 1
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#define BOARD_LED_B 2
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#define BOARD_NLEDS 3
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED_R_BIT (1 << BOARD_LED_R)
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#define BOARD_LED_G_BIT (1 << BOARD_LED_G)
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#define BOARD_LED_B_BIT (1 << BOARD_LED_B)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
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* the Freedom K64F. The following definitions describe how NuttX controls
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* the LEDs:
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*
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* SYMBOL Meaning LED state
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* RED GREEN BLUE
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* ------------------- ---------------------------- -----------------
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*/
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#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */
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#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */
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#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */
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#define LED_INIRQ 0 /* In an interrupt (no change) */
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#define LED_SIGNAL 0 /* In a signal handler (no change) */
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#define LED_ASSERTION 0 /* An assertion failed (no change) */
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#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
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#undef LED_IDLE /* K64 is in sleep mode (Not used) */
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/* Button definitions *******************************************************/
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/* Two push buttons, SW2 and SW3, are available on FRDM-K64F board,
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* where SW2 is connected to PTC6 and SW3 is connected to PTA4.
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* Besides the general purpose input/output functions, SW2 and SW3 can be
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* low-power wake up signal. Also, only SW3 can be a non-maskable interrupt.
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*
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* Switch GPIO Function
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* ------- ---------------------------------------------------------------
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* SW2 PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10
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* SW3 PTA4/FTM0_CH1/NMI_b/LLWU_P3
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*/
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#define BUTTON_SW2 0
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#define BUTTON_SW3 1
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#define NUM_BUTTONS 2
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#define BUTTON_SW2_BIT (1 << BUTTON_SW2)
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#define BUTTON_SW3_BIT (1 << BUTTON_SW3)
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/* Alternative pin resolution ***********************************************/
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/* If there are alternative configurations for various pins in the
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* kinetis_k64pinmux.h header file, those alternative pins will be labeled
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* with a suffix like _1, _2, etc. The logic in this file must select the
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* correct pin configuration for the board by defining a pin configuration
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* (with no suffix) that maps to the correct alternative.
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*/
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/* The primary serial port interface signals are PTB16 UART0_RX and
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* PTB17 UART0_TX.
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* These signals are connected to the OpenSDAv2 circuit.
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*/
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#define PIN_UART0_RX PIN_UART0_RX_3
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#define PIN_UART0_TX PIN_UART0_TX_3
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/* An alternative serial port might use a standard serial shield mounted
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* on the Freedom Board. In this case, Arduino pin D1 provides UART TX and
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* pin D0 provides UART RX.
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*
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* The I/O headers on the FRDM-K64F board are arranged to enable
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* compatibility with Arduino shield. The outer rows of pins (even numbered
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* pins) on the headers, share the same mechanical spacing and placement with
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* the I/O headers on the Arduino Revision 3 (R3) standard.
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*
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* The Arduino D0 and D1 pins then correspond to pins 2 and 4 on the J1 I/O
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* connector:
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*
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* Arduino Pin FRDM-K64F J1 Connector
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* ------------------------ -----------------------
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* UART TX, Arduino D1 pin Pin 4, PTC17, UART3_TX
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* UART RX, Arduino D0 pin Pin 2, PTC16, UART3_RX
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*/
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#define PIN_UART3_RX PIN_UART3_RX_2
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#define PIN_UART3_TX PIN_UART3_TX_2
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/* I2C Bus 0
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*
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* Pin Name K64 Name
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* ---- ----- ------ ---------
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* 11 SCL PTE24 2C0_SCL
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* 12 SDA PTE25 2C0_SDA
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*/
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#define PIN_I2C0_SCL PIN_I2C0_SCL_4
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#define PIN_I2C0_SDA PIN_I2C0_SDA_4
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#endif /* __BOARDS_ARM_FREEDOM_K64F_INCLUDE_BOARD_H */
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