273 lines
9.4 KiB
C
273 lines
9.4 KiB
C
/****************************************************************************
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* drivers/lcd/ft80x.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Definitions for the FTDI FT80x GUI
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*
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* References:
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* - Document No.:
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* FT_000792, "FT800 Embedded Video Engine", Datasheet Version 1.1,
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* Clearance No.:
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* FTDI# 334, Future Technology Devices International Ltd.
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* - Document No.:
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* FT_000986, "FT801 Embedded Video Engine Datasheet", Version 1.0,
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* Clearance No.:
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* FTDI#376, Future Technology Devices International Ltd.
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* - Some definitions derive from FTDI sample code.
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*/
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#ifndef __DRIVERS_LCD_FT80X_H
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#define __DRIVERS_LCD_FT80X_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/signal.h>
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#include <nuttx/wqueue.h>
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* Host write command
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*
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* For a SPI write command write transaction, the host writes a zero bit
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* followed by a one bit, followed by the 5-bit command, followed by two
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* bytes of zero. All data is streamed with a single chip select.
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*
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* I2C data format is equivalent (with obvious differences in bus protocol)
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*/
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struct ft80x_hostwrite_s
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{
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uint8_t cmd; /* Bits 6-7: 01, Bits 0-5: command */
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uint8_t pad1; /* Zero */
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uint8_t pad2; /* Zero */
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};
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/* For SPI memory read transaction, the host sends two zero bits, followed
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* by the 22-bit address. This is followed by a dummy byte. After the dummy
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* byte, the FT80x responds to each host byte with read data bytes.
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*
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* For I2C memory read transaction, bytes are packed in the I2C protocol
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* as follow:
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*
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* [start] <DEVICE ADDRESS + write bit>
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* <00b+Address[21:16]>
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* <Address[15:8]>
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* <Address[7:0]>
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* [restart] <DEVICE ADDRESS + read bit>
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* <Read data byte 0>
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* ....
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* <Read data byte n> [stop]
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*/
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struct ft80x_spiread_s
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{
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uint8_t addrh; /* Bits 6-7: 00, Bits 0-5: Address[21:16] */
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uint8_t addrm; /* Address[15:8] */
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uint8_t addrl; /* Address[7:0] */
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uint8_t dummy; /* Dummy byte */
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};
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struct ft80x_i2cread_s
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{
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uint8_t addrh; /* Bits 6-7: 00, Bits 0-5: Address[21:16] */
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uint8_t addrm; /* Address[15:8] */
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uint8_t addrl; /* Address[7:0] */
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};
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/* For SPI memory write transaction, the host sends a '1' bit and '0' bit,
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* followed by the 22-bit address. This is followed by the write data.
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*
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* For I2C memory write transaction, bytes are packed in the I2C protocol
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* as follow:
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*
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* [start] <DEVICE ADDRESS + write bit>
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* <10b,Address[21:16]>
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* <Address[15:8]>
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* <Address[7:0]>
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* <Write data byte 0>
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* ....
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* <Write data byte n> [stop]
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*/
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struct ft80x_spiwrite_s
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{
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uint8_t addrh; /* Bits 6-7: 10, Bits 0-5: Address[21:16] */
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uint8_t addrm; /* Address[15:8] */
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uint8_t addrl; /* Address[7:0] */
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/* Write data follows */
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};
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struct ft80x_spiwrite8_s
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{
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uint8_t addrh; /* Bits 6-7: 10, Bits 0-5: Address[21:16] */
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uint8_t addrm; /* Address[15:8] */
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uint8_t addrl; /* Address[7:0] */
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uint8_t data; /* 8-bit data follows */
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};
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struct ft80x_spiwrite16_s
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{
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uint8_t addrh; /* Bits 6-7: 10, Bits 0-5: Address[21:16] */
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uint8_t addrm; /* Address[15:8] */
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uint8_t addrl; /* Address[7:0] */
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uint8_t data[2]; /* 16-bit data follows */
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};
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struct ft80x_spiwrite32_s
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{
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uint8_t addrh; /* Bits 6-7: 10, Bits 0-5: Address[21:16] */
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uint8_t addrm; /* Address[15:8] */
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uint8_t addrl; /* Address[7:0] */
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uint8_t data[4]; /* 32-bit data follows */
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};
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struct ft80x_i2cwrite_s
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{
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uint8_t addrh; /* Bits 6-7: 10, Bits 0-5: Address[21:16] */
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uint8_t addrm; /* Address[15:8] */
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uint8_t addrl; /* Address[7:0] */
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/* Write data follows */
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};
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/* This structure describes one signal notification */
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struct ft80x_eventinfo_s
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{
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struct sigevent event; /* Describe the way a task is to be notified */
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struct sigwork_s work; /* Work for SIGEV_THREAD */
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bool enable; /* True: enable notification; false: disable */
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int16_t pid; /* Send the notification to this task */
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};
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/* This structure describes the overall state of the FT80x driver */
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struct spi_dev_s; /* Forward reference */
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struct i2c_master_s; /* Forward reference */
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struct ft80x_dev_s
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{
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/* Cached interface instances */
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#ifdef CONFIG_LCD_FT80X_SPI
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FAR struct spi_dev_s *spi; /* Cached SPI device reference */
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#else
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FAR struct i2c_master_s *i2c; /* Cached SPI device reference */
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#endif
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FAR const struct ft80x_config_s *lower; /* Cached lower half instance */
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/* Internal driver logic */
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struct work_s intwork; /* Support back end interrupt processing */
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uint32_t frequency; /* Effective frequency */
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sem_t exclsem; /* Mutual exclusion semaphore */
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#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
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uint8_t crefs; /* Number of open references */
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bool unlinked; /* True if the driver has been unlinked */
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#endif
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/* Event notification support */
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struct ft80x_eventinfo_s notify[FT80X_INT_NEVENTS];
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};
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/****************************************************************************
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* Public Functions Definitions
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****************************************************************************/
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/****************************************************************************
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* Name: ft80x_host_command
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*
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* Description:
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* Send a host command to the FT80x
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*
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* FFor a SPI write command write transaction, the host writes a zero bit
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* followed by a one bit, followed by the 5-bit command, followed by two
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* bytes of zero. All data is streamed with a single chip select.
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*
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****************************************************************************/
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void ft80x_host_command(FAR struct ft80x_dev_s *priv, uint8_t cmd);
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/****************************************************************************
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* Name: ft80x_read_memory
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*
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* Description:
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* Read from FT80X memory
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*
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* For SPI memory read transaction, the host sends two zero bits, followed
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* by the 22-bit address. This is followed by a dummy byte. After the dummy
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* byte, the FT80x responds to each host byte with read data bytes.
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*
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****************************************************************************/
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void ft80x_read_memory(FAR struct ft80x_dev_s *priv, uint32_t addr,
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FAR void *buffer, size_t buflen);
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/****************************************************************************
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* Name: ft80x_read_byte, ft80x_read_hword, ft80x_read_word
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*
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* Description:
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* Read an 8-, 16-, or 32-bt bit value from FT80X memory
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*
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* For SPI memory read transaction, the host sends two zero bits, followed
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* by the 22-bit address. This is followed by a dummy byte. After the dummy
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* byte, the FT80x responds to each host byte with read data bytes.
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*
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****************************************************************************/
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uint8_t ft80x_read_byte(FAR struct ft80x_dev_s *priv, uint32_t addr);
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uint16_t ft80x_read_hword(FAR struct ft80x_dev_s *priv, uint32_t addr);
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uint32_t ft80x_read_word(FAR struct ft80x_dev_s *priv, uint32_t addr);
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/****************************************************************************
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* Name: ft80x_write_memory
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*
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* Description:
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* Write to FT80X memory
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*
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* For SPI memory write transaction, the host sends a '1' bit and '0' bit,
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* followed by the 22-bit address. This is followed by the write data.
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*
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****************************************************************************/
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void ft80x_write_memory(FAR struct ft80x_dev_s *priv, uint32_t addr,
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FAR const void *buffer, size_t buflen);
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/****************************************************************************
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* Name: ft80x_write_byte, ft80x_write_hword, ft80x_write_word
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*
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* Description:
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* Write an 8-, 16-, or 32-bt bit value to FT80X memory
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*
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* For SPI memory write transaction, the host sends a '1' bit and '0' bit,
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* followed by the 22-bit address. This is followed by the write data.
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*
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****************************************************************************/
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void ft80x_write_byte(FAR struct ft80x_dev_s *priv, uint32_t addr,
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uint8_t data);
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void ft80x_write_hword(FAR struct ft80x_dev_s *priv, uint32_t addr,
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uint16_t data);
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void ft80x_write_word(FAR struct ft80x_dev_s *priv, uint32_t addr,
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uint32_t data);
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#endif /* __DRIVERS_LCD_FT80X_H */
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