09cc29af4d
armv6-m/arm_exception.S:139:2: error: invalid instruction, any one of the following would fix this: sub r1, #(4 * (10)) ^ armv6-m/arm_exception.S:139:2: note: instruction requires: thumb2 sub r1, #(4 * (10)) ^ armv6-m/arm_exception.S:139:10: note: invalid operand for instruction sub r1, #(4 * (10)) ^ armv6-m/arm_exception.S:139:2: note: no flag-preserving variant of this instruction available sub r1, #(4 * (10)) ^ armv6-m/arm_exception.S:139:10: note: operand must be a register in range [r0, r7] sub r1, #(4 * (10)) ^ ----------------------------------------- bringup.c:125:18: warning: variable 'ret' is uninitialized when used here [-Wuninitialized] return ret; ^~~ bringup.c:73:10: note: initialize the variable 'ret' to silence this warning int ret; ^ = 0 Signed-off-by: chao an <anchao@xiaomi.com> |
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README.txt |
README.txt
STATUS ====== 05/17: The basic NSH configuration is functional and shows that there is 3-4KB of free heap space. However, attempts to extend this have failed. I suspect that 8KB of SRAM is insufficient to do much with the existing NSH configuration. Perhaps some fine tuning can improve this situation but at this point, I think this board is only useful for the initial STM32 F0 bring-up, perhaps for embedded solutions that do not use NSH and for general experimentation. There is also support for the Nucleo boards with the STM32 F072 and F092 MCUs. Those ports do not suffer from these problems and seem to work well in fairly complex configurations. Apparently 8KB is SRAM is not usable but the parts with larger 16KB and 32KB SRAMs are better matches.