1151 lines
28 KiB
C
1151 lines
28 KiB
C
/****************************************************************************
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* drivers/contactless/pn532.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <stdlib.h>
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#include <string.h>
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#include <errno.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/signal.h>
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#include "pn532.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* Bit order H/W feature must be enabled in order to support LSB first
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* operation.
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*/
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#if !defined(CONFIG_SPI_HWFEATURES) || !defined(CONFIG_SPI_BITORDER)
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# error CONFIG_SPI_HWFEATURES=y and CONFIG_SPI_BITORDER=y required by this driver
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#endif
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#ifndef CONFIG_ARCH_HAVE_SPI_BITORDER
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# warning This platform does not support SPI LSB-bit order
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#endif
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#ifdef CONFIG_CL_PN532_DEBUG_TX
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# define tracetx errdumpbuffer
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#else
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# define tracetx(x...)
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#endif
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#ifdef CONFIG_CL_PN532_DEBUG_RX
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# define tracerx errdumpbuffer
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#else
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# define tracerx(x...)
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#endif
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#define FRAME_SIZE(f) (sizeof(struct pn532_frame) + f->len + 2)
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#define FRAME_POSTAMBLE(f) (f->data[f->len + 1])
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static inline void pn532_configspi(FAR struct spi_dev_s *spi);
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static void pn532_lock(FAR struct spi_dev_s *spi);
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static void pn532_unlock(FAR struct spi_dev_s *spi);
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/* Character driver methods */
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static int _open(FAR struct file *filep);
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static int _close(FAR struct file *filep);
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static ssize_t _read(FAR struct file *filep,
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FAR char *buffer, size_t buflen);
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static ssize_t _write(FAR struct file *filep, FAR const char *buffer,
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size_t buflen);
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static int _ioctl(FAR struct file *filep, int cmd, unsigned long arg);
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static uint8_t pn532_checksum(uint8_t value);
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static uint8_t pn532_data_checksum(FAR uint8_t *data, int datalen);
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int pn532_read(FAR struct pn532_dev_s *dev, FAR uint8_t *buff, uint8_t n);
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#if 0 /* TODO */
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/* IRQ Handling */
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static int pn532_irqhandler(FAR int irq, FAR void *context, FAR void *dev);
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static inline int pn532_attachirq(FAR struct pn532_dev_s *dev, xcpt_t isr);
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct file_operations g_pn532fops =
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{
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_open, /* open */
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_close, /* close */
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_read, /* read */
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_write, /* write */
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NULL, /* seek */
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_ioctl, /* ioctl */
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};
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static const uint8_t pn532ack[] =
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{
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0x00, 0x00, 0xff, 0x00, 0xff, 0x00
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static void pn532_lock(FAR struct spi_dev_s *spi)
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{
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int ret;
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SPI_LOCK(spi, true);
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SPI_SETMODE(spi, SPIDEV_MODE0);
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SPI_SETBITS(spi, 8);
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ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST);
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if (ret < 0)
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{
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ctlserr("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret);
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}
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SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ);
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}
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static void pn532_unlock(FAR struct spi_dev_s *spi)
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{
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SPI_LOCK(spi, false);
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}
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static inline void pn532_configspi(FAR struct spi_dev_s *spi)
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{
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int ret;
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/* Configure SPI for the PN532 module. */
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SPI_SETMODE(spi, SPIDEV_MODE0);
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SPI_SETBITS(spi, 8);
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ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST);
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if (ret < 0)
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{
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ctlserr("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret);
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}
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SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ);
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}
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static inline void pn532_select(FAR struct pn532_dev_s *dev)
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{
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if (dev->config->select)
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{
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dev->config->select(dev, true);
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}
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else
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{
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SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS(0), true);
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}
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}
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static inline void pn532_deselect(FAR struct pn532_dev_s *dev)
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{
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if (dev->config->select)
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{
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dev->config->select(dev, false);
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}
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else
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{
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SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS(0), false);
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}
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}
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static void pn532_frame_init(FAR struct pn532_frame *frame, uint8_t cmd)
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{
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frame->preamble = PN532_PREAMBLE;
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frame->start_code = PN532_SOF;
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frame->tfi = PN532_HOSTTOPN532;
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frame->data[0] = cmd;
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frame->len = 2;
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}
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static void pn532_frame_finish(FAR struct pn532_frame *frame)
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{
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frame->lcs = pn532_checksum(frame->len);
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frame->data[frame->len - 1] = pn532_data_checksum(&frame->tfi, frame->len);
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frame->data[frame->len] = PN532_POSTAMBLE;
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}
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static inline uint8_t pn532_checksum(uint8_t value)
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{
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return ~value + 1;
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}
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static uint8_t pn532_data_checksum(FAR uint8_t *data, int datalen)
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{
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uint8_t sum = 0x00;
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int i;
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for (i = 0; i < datalen; i++)
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{
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sum += data[i];
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}
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return pn532_checksum(sum);
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}
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bool pn532_rx_frame_is_valid(FAR struct pn532_frame *f, bool check_data)
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{
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uint8_t chk;
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if (f->start_code != PN532_SOF)
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{
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ctlserr("ERROR: Frame startcode 0x%X != 0x%X\n",
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PN532_SOF, f->start_code);
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return false;
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}
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if (f->tfi != PN532_PN532TOHOST)
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{
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return false;
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}
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chk = pn532_checksum(f->len);
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if (chk != f->lcs)
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{
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ctlserr("ERROR: Frame data len checksum failed");
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return false;
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}
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if (check_data)
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{
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chk = pn532_data_checksum(&f->tfi, f->len);
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if (chk != f->data[f->len - 1])
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{
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ctlserr("ERROR: Frame data checksum failed: calc=0x%X != 0x%X",
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chk, f->data[f->len - 1]);
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return false;
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}
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}
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return true;
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}
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static uint8_t pn532_status(FAR struct pn532_dev_s *dev)
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{
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int rs;
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pn532_lock(dev->spi);
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pn532_select(dev);
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rs = SPI_SEND(dev->spi, PN532_SPI_STATREAD);
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rs = SPI_SEND(dev->spi, PN532_SPI_STATREAD);
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pn532_deselect(dev);
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pn532_unlock(dev->spi);
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return rs;
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}
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/****************************************************************************
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* Name: pn532_wait_rx_ready
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*
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* Description:
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* Blocks until Data frame available from chip.
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*
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* Input Parameters:
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* dev
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* timeout
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*
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* Returned Value:
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* 0 for OK. -ETIMEDOUT if no data available
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*
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****************************************************************************/
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static int pn532_wait_rx_ready(FAR struct pn532_dev_s *dev, int timeout)
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{
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int ret = OK;
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#ifdef CONFIG_PN532_USE_IRQ_FLOW_CONTROL
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nxsem_tickwait(dev->sem_rx, SEC2TICK(1));
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#endif
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/* TODO: Handle Exception bits 2, 3 */
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while (pn532_status(dev) != PN532_SPI_READY)
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{
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if (--timeout == 0x00)
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{
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ctlserr("ERROR: wait RX timeout!\n");
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return -ETIMEDOUT;
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}
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nxsig_usleep(1000);
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}
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dev->state = PN532_STATE_DATA_READY;
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return ret;
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}
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/****************************************************************************
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* Name: pn532_writecommand
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*
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* Description:
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* Helper for debug/testing
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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#if 0
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static void pn532_writecommand(FAR struct pn532_dev_s *dev, uint8_t cmd)
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{
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char cmd_buffer[16];
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FAR struct pn532_frame *f = (FAR struct pn532_frame *)cmd_buffer;
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pn532_frame_init(f, cmd);
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pn532_frame_finish(f);
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pn532_lock(dev->spi);
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pn532_select(dev);
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nxsig_usleep(10000);
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SPI_SEND(dev->spi, PN532_SPI_DATAWRITE);
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SPI_SNDBLOCK(dev->spi, f, FRAME_SIZE(f));
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pn532_deselect(dev);
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pn532_unlock(dev->spi);
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tracetx("command sent", (uint8_t *) f, FRAME_SIZE(f));
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}
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#endif
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/****************************************************************************
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* Name: pn532_read
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*
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* Description:
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* RAW Read data from chip.
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* NOTE: This WON'T wait if data is available!
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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int pn532_read(FAR struct pn532_dev_s *dev, FAR uint8_t *buff, uint8_t n)
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{
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pn532_lock(dev->spi);
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pn532_select(dev);
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SPI_SEND(dev->spi, PN532_SPI_DATAREAD);
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SPI_RECVBLOCK(dev->spi, buff, n);
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pn532_deselect(dev);
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pn532_unlock(dev->spi);
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tracerx("read", buff, n);
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return n;
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}
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int pn532_read_more(FAR struct pn532_dev_s *dev,
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FAR uint8_t *buff, uint8_t n)
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{
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pn532_lock(dev->spi);
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pn532_select(dev);
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SPI_RECVBLOCK(dev->spi, buff, n);
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pn532_deselect(dev);
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pn532_unlock(dev->spi);
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tracerx("read_more", buff, n);
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return n;
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}
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/****************************************************************************
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* Name: pn532_read_ack
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*
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* Description:
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* Read Ack response from device
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*
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* Input Parameters:
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* dev
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*
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* Returned Value:
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* 0 = NOK, 1 = OK
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*
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****************************************************************************/
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int pn532_read_ack(FAR struct pn532_dev_s *dev)
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{
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int res = 0;
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uint8_t ack[6];
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pn532_read(dev, (uint8_t *) &ack, 6);
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if (memcmp(&ack, &pn532ack, 6) == 0x00)
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{
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res = 1;
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}
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else
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{
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ctlsinfo("ACK NOK");
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res = 0;
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}
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return res;
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}
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/****************************************************************************
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* Name: pn532_write_frame
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*
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* Description:
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* Write frame to chip. Also waits and reads ACK frame from chip.
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*
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* Construct frame with
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* pn532_frame_init(), pn532_frame_finish()
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*
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* Input Parameters:
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* dev - Device instance
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* f - Pointer to start frame
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*
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* Returned Value:
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* 0 for OK, negative for error
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*
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****************************************************************************/
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int pn532_write_frame(FAR struct pn532_dev_s *dev, FAR struct pn532_frame *f)
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{
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int res = OK;
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pn532_lock(dev->spi);
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pn532_select(dev);
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nxsig_usleep(2000);
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SPI_SEND(dev->spi, PN532_SPI_DATAWRITE);
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SPI_SNDBLOCK(dev->spi, f, FRAME_SIZE(f));
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pn532_deselect(dev);
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pn532_unlock(dev->spi);
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tracetx("WriteFrame", (uint8_t *) f, FRAME_SIZE(f));
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/* Wait ACK frame */
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res = pn532_wait_rx_ready(dev, 30);
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if (res == OK)
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{
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if (!pn532_read_ack(dev))
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{
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ctlserr("ERROR: command FAILED\n");
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res = -EIO;
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}
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}
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return res;
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}
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int pn532_read_frame(FAR struct pn532_dev_s *dev, FAR struct pn532_frame *f,
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int max_size)
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{
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int res = -EIO;
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/* Wait for frame available */
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if ((res = pn532_wait_rx_ready(dev, 100)) == OK)
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{
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/* Read header */
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pn532_read(dev, (uint8_t *) f, sizeof(struct pn532_frame));
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if (pn532_rx_frame_is_valid(f, false))
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{
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if (max_size < f->len)
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{
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return -EINVAL;
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}
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pn532_read_more(dev, &f->data[0], f->len);
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/* TODO: optimize frame integrity check...
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* pn532_data_checksum(&f.tfi, f->len);
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* errdumpbuffer("RX Frame:", f, f->len+6);
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*/
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if (pn532_rx_frame_is_valid(f, true))
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{
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res = OK;
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}
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}
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}
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return res;
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}
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bool pn532_set_config(FAR struct pn532_dev_s *dev, uint8_t flags)
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{
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char cmd_buffer[2 + 7];
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FAR struct pn532_frame *f = (FAR struct pn532_frame *)cmd_buffer;
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pn532_frame_init(f, PN532_COMMAND_SETPARAMETERS);
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f->data[1] = flags;
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f->len += 1;
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pn532_frame_finish(f);
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uint8_t resp[9];
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bool res = false;
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if (pn532_write_frame(dev, f) == OK)
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{
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pn532_read(dev, (uint8_t *) &resp, 9);
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tracerx("set config response", resp, 9);
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res = true;
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}
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return res;
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}
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int pn532_sam_config(FAR struct pn532_dev_s *dev,
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FAR struct pn_sam_settings_s *settings)
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{
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char cmd_buffer[4 + 7];
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FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
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int res;
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pn532_frame_init(f, PN532_COMMAND_SAMCONFIGURATION);
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f->data[1] = PN532_SAM_NORMAL_MODE;
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f->data[2] = 0x14; /* Timeout LSB=50ms 0x14*50ms = 1sec */
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f->data[3] = 0x01; /* P-70, IRQ enabled */
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if (settings)
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{
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/* TODO: !!! */
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}
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f->len += 3;
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pn532_frame_finish(f);
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res = -EIO;
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if (pn532_write_frame(dev, f) == OK)
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{
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if (pn532_read_frame(dev, f, 4) == OK)
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{
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tracerx("sam config response", (uint8_t *) f->data, 3);
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if (f->data[0] == PN532_COMMAND_SAMCONFIGURATION + 1)
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{
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res = OK;
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}
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}
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}
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|
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return res;
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}
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|
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int pn532_get_fw_version(FAR struct pn532_dev_s *dev,
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|
FAR struct pn_firmware_version *fv)
|
|
{
|
|
uint8_t cmd_buffer[4 + 8 + 1];
|
|
FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
|
|
struct pn_firmware_version *fw;
|
|
int res = -EIO;
|
|
|
|
pn532_frame_init(f, PN532_COMMAND_GETFIRMWAREVERSION);
|
|
pn532_frame_finish(f);
|
|
|
|
if (pn532_write_frame(dev, f) == OK)
|
|
{
|
|
if (pn532_read_frame(dev, f, 6) == OK)
|
|
{
|
|
if (f->data[0] == PN532_COMMAND_GETFIRMWAREVERSION + 1)
|
|
{
|
|
fw = (FAR struct pn_firmware_version *) &f->data[1];
|
|
ctlsinfo("FW: %d.%d on IC:0x%X (Features: 0x%X)\n",
|
|
fw->ver, fw->rev, fw->ic, fw->support);
|
|
if (fv)
|
|
{
|
|
memcpy(fv, fw, sizeof(struct pn_firmware_version));
|
|
}
|
|
|
|
res = OK;
|
|
}
|
|
}
|
|
}
|
|
|
|
return res;
|
|
}
|
|
|
|
int pn532_write_gpio(FAR struct pn532_dev_s *dev, uint8_t p3, uint8_t p7)
|
|
{
|
|
uint8_t cmd_buffer[3 + 7];
|
|
FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
|
|
int res = -EIO;
|
|
|
|
pn532_frame_init(f, PN532_COMMAND_WRITEGPIO);
|
|
f->data[1] = p3;
|
|
f->data[2] = p7;
|
|
f->len += 2;
|
|
pn532_frame_finish(f);
|
|
|
|
if (pn532_write_frame(dev, f))
|
|
{
|
|
pn532_read(dev, cmd_buffer, 10);
|
|
tracetx("Resp:", cmd_buffer, 10);
|
|
ctlsinfo("TFI=%x, data0=%X", f->tfi, f->data[0]);
|
|
if ((f->tfi == PN532_PN532TOHOST) &&
|
|
(f->data[0] == PN532_COMMAND_WRITEGPIO + 1))
|
|
{
|
|
res = OK;
|
|
}
|
|
}
|
|
|
|
return res;
|
|
}
|
|
|
|
uint32_t pn532_write_passive_data(FAR struct pn532_dev_s *dev,
|
|
uint8_t address, FAR uint8_t *data,
|
|
uint8_t len)
|
|
{
|
|
uint8_t cmd_buffer[8 + 7];
|
|
FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
|
|
uint8_t resp[20];
|
|
uint32_t res = -EIO;
|
|
|
|
pn532_frame_init(f, PN532_COMMAND_INDATAEXCHANGE);
|
|
f->data[1] = 1; /* max n cards at once */
|
|
f->data[2] = 0xa2; /* command WRITE */
|
|
f->data[3] = address; /* ADDRESS, 0 = serial */
|
|
memcpy(&f->data[4], data, len);
|
|
f->len += 7;
|
|
pn532_frame_finish(f);
|
|
|
|
if (pn532_write_frame(dev, f) == OK)
|
|
{
|
|
if (dev->state == PN532_STATE_DATA_READY)
|
|
{
|
|
if (pn532_read_frame(dev, (FAR struct pn532_frame *) resp, 15)
|
|
== OK)
|
|
{
|
|
dev->state = PN532_STATE_IDLE;
|
|
f = (FAR struct pn532_frame *) resp;
|
|
tracerx("passive target id resp:", (FAR uint8_t *)f,
|
|
f->len + 6);
|
|
|
|
if (f->data[0] == PN532_COMMAND_INDATAEXCHANGE + 1)
|
|
{
|
|
res = f->data[1];
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return res;
|
|
}
|
|
|
|
uint32_t pn532_read_passive_data(FAR struct pn532_dev_s *dev,
|
|
uint8_t address, FAR uint8_t *data,
|
|
uint8_t len)
|
|
{
|
|
uint8_t cmd_buffer[4 + 7];
|
|
FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
|
|
uint8_t resp[30];
|
|
uint32_t res = -1;
|
|
|
|
pn532_frame_init(f, PN532_COMMAND_INDATAEXCHANGE);
|
|
f->data[1] = 1; /* max n cards at once */
|
|
f->data[2] = 0x30; /* command READ */
|
|
f->data[3] = address; /* ADDRESS, 0 = serial */
|
|
f->len += 3;
|
|
pn532_frame_finish(f);
|
|
|
|
if (pn532_write_frame(dev, f) == OK)
|
|
{
|
|
if (dev->state == PN532_STATE_DATA_READY)
|
|
{
|
|
if (pn532_read_frame(dev,
|
|
(FAR struct pn532_frame *)resp, 25) == OK)
|
|
{
|
|
dev->state = PN532_STATE_IDLE;
|
|
f = (FAR struct pn532_frame *) resp;
|
|
tracerx("passive target id resp:", (FAR uint8_t *)f,
|
|
f->len + 6);
|
|
|
|
if (f->data[0] == PN532_COMMAND_INDATAEXCHANGE + 1)
|
|
{
|
|
if (f->data[1] == 0 && data && len)
|
|
{
|
|
memcpy(data, &f->data[2], len);
|
|
}
|
|
|
|
res = f->data[1];
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return res;
|
|
}
|
|
|
|
uint32_t pn532_read_passive_target_id(FAR struct pn532_dev_s *dev,
|
|
uint8_t baudrate)
|
|
{
|
|
uint8_t cmd_buffer[4 + 7];
|
|
FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
|
|
uint8_t resp[20];
|
|
uint32_t res = -EAGAIN;
|
|
int i;
|
|
|
|
if (dev->state == PN532_STATE_DATA_READY)
|
|
{
|
|
res = -EIO;
|
|
if (pn532_read_frame(dev, (FAR struct pn532_frame *) resp, 15) == OK)
|
|
{
|
|
FAR struct pn_poll_response *r;
|
|
|
|
dev->state = PN532_STATE_IDLE;
|
|
f = (FAR struct pn532_frame *) resp;
|
|
r = (FAR struct pn_poll_response *) &f->data[1];
|
|
|
|
tracerx("passive target id resp:", (FAR uint8_t *)f, f->len + 6);
|
|
|
|
if (f->data[0] == PN532_COMMAND_INLISTPASSIVETARGET + 1)
|
|
{
|
|
uint32_t cid = 0;
|
|
|
|
if (r->nbtg == 1)
|
|
{
|
|
FAR struct pn_target_type_a *t =
|
|
(FAR struct pn_target_type_a *)&r->target_data;
|
|
|
|
ctlsinfo("Found %d card(s)\n", r->nbtg);
|
|
|
|
/* now supports only type_a cards
|
|
* if (poll_mode == PN532_POLL_MOD_106KBPS_A)
|
|
*/
|
|
|
|
ctlsinfo("sens:0x%x sel:0x%x", t->sens_res, t->sel_res);
|
|
ctlsinfo("idlen:0x%x ", t->nfcid_len);
|
|
|
|
/* generate 32bit cid from id (could be longer)
|
|
* HACK: Using only top 4 bytes.
|
|
*/
|
|
|
|
for (i = 0; i < 4 /* t->nfcid_len */; i++)
|
|
{
|
|
cid <<= 8;
|
|
cid |= t->nfcid_data[i];
|
|
}
|
|
}
|
|
|
|
res = cid;
|
|
}
|
|
}
|
|
}
|
|
|
|
return res;
|
|
}
|
|
|
|
static int pn532_read_passive_target(FAR struct pn532_dev_s *dev,
|
|
uint8_t baudrate)
|
|
{
|
|
uint8_t cmd_buffer[4 + 7];
|
|
FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
|
|
|
|
pn532_frame_init(f, PN532_COMMAND_INLISTPASSIVETARGET);
|
|
f->data[1] = 1;
|
|
f->data[2] = baudrate;
|
|
f->len += 2;
|
|
pn532_frame_finish(f);
|
|
return pn532_write_frame(dev, f);
|
|
}
|
|
|
|
bool pn532_set_rf_config(struct pn532_dev_s * dev,
|
|
struct pn_rf_config_s * conf)
|
|
{
|
|
bool res = false;
|
|
uint8_t cmd_buffer[15 + 7];
|
|
FAR struct pn532_frame *f = (FAR struct pn532_frame *) cmd_buffer;
|
|
|
|
pn532_frame_init(f, PN532_COMMAND_RFCONFIGURATION);
|
|
f->data[1] = conf->cfg_item;
|
|
memcpy(&f->data[2], conf->config, conf->data_size);
|
|
f->len += conf->data_size + 1;
|
|
pn532_frame_finish(f);
|
|
|
|
if (pn532_write_frame(dev, f) == OK)
|
|
{
|
|
pn532_read(dev, (uint8_t *) f, 10);
|
|
tracerx("rf config response", (uint8_t *) f, 10);
|
|
if (pn532_rx_frame_is_valid(f, true))
|
|
{
|
|
if (f->data[0] == PN532_COMMAND_RFCONFIGURATION + 1)
|
|
{
|
|
res = true;
|
|
}
|
|
}
|
|
}
|
|
|
|
return res;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pn532_attachirq
|
|
*
|
|
* Description:
|
|
* IRQ handling TODO:
|
|
*
|
|
* Input Parameters:
|
|
*
|
|
* Returned Value:
|
|
*
|
|
****************************************************************************/
|
|
|
|
#if 0
|
|
static inline int (FAR struct pn532_dev_s *dev, xcpt_t isr)
|
|
{
|
|
return dev->config->irqattach(dev, isr);
|
|
}
|
|
|
|
static int irq_handler(int irq, FAR void *context)
|
|
{
|
|
ctlsinfo("*IRQ*\n");
|
|
work_queue(HPWORK, &g_dev->irq_work, pn532_worker, dev, 0);
|
|
|
|
return OK;
|
|
}
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Name: pn532_open
|
|
*
|
|
* Description:
|
|
* This function is called whenever the PN532 device is opened.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int _open(FAR struct file *filep)
|
|
{
|
|
FAR struct inode *inode;
|
|
FAR struct pn532_dev_s *dev;
|
|
|
|
DEBUGASSERT(filep);
|
|
inode = filep->f_inode;
|
|
|
|
DEBUGASSERT(inode && inode->i_private);
|
|
dev = inode->i_private;
|
|
|
|
pn532_configspi(dev->spi);
|
|
|
|
dev->config->reset(1);
|
|
nxsig_usleep(10000);
|
|
|
|
pn532_sam_config(dev, NULL);
|
|
pn532_get_fw_version(dev, NULL);
|
|
|
|
dev->state = PN532_STATE_IDLE;
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: _close
|
|
*
|
|
* Description:
|
|
* This routine is called when the PN532 device is closed.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int _close(FAR struct file *filep)
|
|
{
|
|
FAR struct inode *inode;
|
|
FAR struct pn532_dev_s *dev;
|
|
|
|
DEBUGASSERT(filep);
|
|
inode = filep->f_inode;
|
|
|
|
DEBUGASSERT(inode && inode->i_private);
|
|
dev = inode->i_private;
|
|
|
|
dev->config->reset(0);
|
|
dev->state = PN532_STATE_NOT_INIT;
|
|
|
|
#ifdef CONFIG_PM
|
|
if (dev->pm_level >= PM_SLEEP)
|
|
{
|
|
#if 0
|
|
priv->config->reset(0);
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: _read
|
|
*
|
|
* Description:
|
|
* This routine is called when the device is read.
|
|
*
|
|
* Returned Value:
|
|
* TAG id as string to buffer or -EIO if no TAG found
|
|
*
|
|
****************************************************************************/
|
|
|
|
static ssize_t _read(FAR struct file *filep, FAR char *buffer, size_t buflen)
|
|
{
|
|
FAR struct inode *inode;
|
|
FAR struct pn532_dev_s *dev;
|
|
|
|
DEBUGASSERT(filep);
|
|
inode = filep->f_inode;
|
|
|
|
DEBUGASSERT(inode && inode->i_private);
|
|
dev = inode->i_private;
|
|
|
|
uint32_t id = pn532_read_passive_target_id(dev, PN532_MIFARE_ISO14443A);
|
|
if (id != 0xffffffff)
|
|
{
|
|
if (buffer)
|
|
{
|
|
return snprintf(buffer, buflen, "0X%X", id);
|
|
}
|
|
}
|
|
|
|
return -EIO;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pn532_write
|
|
****************************************************************************/
|
|
|
|
static ssize_t _write(FAR struct file *filep, FAR const char *buffer,
|
|
size_t buflen)
|
|
{
|
|
FAR struct inode *inode;
|
|
FAR struct pn532_dev_s *dev;
|
|
|
|
DEBUGASSERT(filep);
|
|
inode = filep->f_inode;
|
|
|
|
DEBUGASSERT(inode && inode->i_private);
|
|
dev = inode->i_private;
|
|
|
|
UNUSED(dev);
|
|
|
|
return -ENOSYS;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pn532_ioctl
|
|
****************************************************************************/
|
|
|
|
static int _ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|
{
|
|
FAR struct inode *inode;
|
|
FAR struct pn532_dev_s *dev;
|
|
int ret = OK;
|
|
|
|
DEBUGASSERT(filep);
|
|
inode = filep->f_inode;
|
|
|
|
DEBUGASSERT(inode && inode->i_private);
|
|
dev = inode->i_private;
|
|
|
|
switch (cmd)
|
|
{
|
|
case PN532IOC_READ_TAG_DATA:
|
|
{
|
|
FAR struct pn_mifare_tag_data_s *tag_data =
|
|
(FAR struct pn_mifare_tag_data_s *) arg;
|
|
|
|
if (tag_data != 0)
|
|
{
|
|
/* HACK: get rid of previous command */
|
|
|
|
if (dev->state == PN532_STATE_CMD_SENT)
|
|
{
|
|
if (pn532_wait_rx_ready(dev, 1))
|
|
{
|
|
pn532_read_passive_target_id(dev, 0);
|
|
}
|
|
}
|
|
|
|
ret = pn532_read_passive_data(dev, tag_data->address,
|
|
(uint8_t *) &tag_data->data,
|
|
sizeof(tag_data->data));
|
|
|
|
dev->state = PN532_STATE_IDLE;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case PN532IOC_WRITE_TAG_DATA:
|
|
{
|
|
FAR struct pn_mifare_tag_data_s *tag_data =
|
|
(FAR struct pn_mifare_tag_data_s *) arg;
|
|
|
|
if (tag_data != 0)
|
|
{
|
|
/* HACK: get rid of previous command */
|
|
|
|
if (dev->state == PN532_STATE_CMD_SENT)
|
|
{
|
|
if (pn532_wait_rx_ready(dev, 1))
|
|
{
|
|
pn532_read_passive_target_id(dev, 0);
|
|
}
|
|
}
|
|
|
|
ret = pn532_write_passive_data(dev, tag_data->address,
|
|
(FAR uint8_t *) &tag_data->data,
|
|
sizeof(tag_data->data));
|
|
|
|
dev->state = PN532_STATE_IDLE;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case PN532IOC_SET_SAM_CONF:
|
|
pn532_sam_config(dev, (FAR struct pn_sam_settings_s *) arg);
|
|
break;
|
|
|
|
case PN532IOC_READ_PASSIVE:
|
|
if (dev->state == PN532_STATE_CMD_SENT)
|
|
{
|
|
FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg);
|
|
*ptr = pn532_read_passive_target_id(dev, 0);
|
|
}
|
|
else
|
|
{
|
|
FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg);
|
|
*ptr = -1;
|
|
}
|
|
break;
|
|
|
|
case PN532IOC_SET_RF_CONF:
|
|
pn532_set_rf_config(dev, (FAR struct pn_rf_config_s *) arg);
|
|
break;
|
|
|
|
case PN532IOC_SEND_CMD_READ_PASSIVE:
|
|
ret = pn532_read_passive_target(dev, 0);
|
|
if (ret == 0)
|
|
{
|
|
dev->state = PN532_STATE_CMD_SENT;
|
|
}
|
|
else
|
|
{
|
|
dev->state = PN532_STATE_IDLE;
|
|
}
|
|
break;
|
|
|
|
case PN532IOC_GET_DATA_READY:
|
|
if (pn532_wait_rx_ready(dev, 1))
|
|
{
|
|
ret = 0;
|
|
}
|
|
else
|
|
{
|
|
ret = 1;
|
|
}
|
|
break;
|
|
|
|
case PN532IOC_GET_TAG_ID:
|
|
{
|
|
FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg);
|
|
*ptr = pn532_read_passive_target_id(dev, 0);
|
|
}
|
|
break;
|
|
|
|
case PN532IOC_GET_STATE:
|
|
ret = dev->state;
|
|
break;
|
|
|
|
default:
|
|
ctlserr("ERROR: Unrecognized cmd: %d\n", cmd);
|
|
ret = -ENOTTY;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: pn532_register
|
|
*
|
|
* Description:
|
|
* Register the PN532 character device as 'devpath'
|
|
*
|
|
* Input Parameters:
|
|
* devpath - The full path to the driver to register.
|
|
* E.g., "/dev/nfc0"
|
|
* spi - An instance of the SPI interface to use to communicate with
|
|
* PN532.
|
|
* config - chip config
|
|
*
|
|
* Returned Value:
|
|
* Zero (OK) on success; a negated errno value on failure.
|
|
*
|
|
****************************************************************************/
|
|
|
|
int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi,
|
|
FAR struct pn532_config_s *config)
|
|
{
|
|
FAR struct pn532_dev_s *dev;
|
|
int ret;
|
|
|
|
/* Initialize the PN532 device structure */
|
|
|
|
dev = (FAR struct pn532_dev_s *)kmm_malloc(sizeof(struct pn532_dev_s));
|
|
if (!dev)
|
|
{
|
|
ctlserr("ERROR: Failed to allocate instance\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
dev->spi = spi;
|
|
dev->config = config;
|
|
|
|
#if defined CONFIG_PM
|
|
dev->pm_level = PM_IDLE;
|
|
#endif
|
|
|
|
/* pn532_attachirq(dev, pn532_irqhandler); */
|
|
|
|
/* Register the character driver */
|
|
|
|
ret = register_driver(devpath, &g_pn532fops, 0666, dev);
|
|
if (ret < 0)
|
|
{
|
|
ctlserr("ERROR: Failed to register driver: %d\n", ret);
|
|
kmm_free(dev);
|
|
}
|
|
|
|
return ret;
|
|
}
|