265 lines
7.3 KiB
C
265 lines
7.3 KiB
C
/****************************************************************************
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* arch/arm/include/tlsr82/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_TLSR82_IRQ_H
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#define __ARCH_ARM_INCLUDE_TLSR82_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/irq.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/* Define this to prevent the arch irq.h include */
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#define __ARCH_ARM_INCLUDE_ARMV6_M_IRQ_H
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#define _REG_BASE_ADDR 0x00800000
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#define _REG_ADDR8(a) (*(volatile uint8_t *)(_REG_BASE_ADDR + (a)))
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#define _REG_ADDR32(a) (*(volatile uint32_t *)(_REG_BASE_ADDR + (a)))
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#define _IRQ_MASK_REG _REG_ADDR32(0x640)
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#define _IRQ_EN_REG _REG_ADDR8(0x643)
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#define NR_TIMER0_IRQ 0
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#define NR_TIMER1_IRQ 1
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#define NR_TIMER2_IRQ 2
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#define NR_USB_PWDN_IRQ 3
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#define NR_DMA_IRQ 4
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#define NR_DMA_FIFO_IRQ 5
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#define NR_UART_IRQ 6
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#define NR_MIX_CMD_IRQ 7
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#define NR_EP0_SETUP_IRQ 8
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#define NR_EP0_DATA_IRQ 9
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#define NR_EP0_STA_IRQ 10
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#define NR_SET_INTF_IRQ 11
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#define NR_EP_DATA_IRQ 12
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#define NR_RF_IRQ 13
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#define NR_SW_PWM_IRQ 14
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#define NR_PKE_IRQ 15
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#define NR_USB_250US_IRQ 16
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#define NR_USB_RST_IRQ 17
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#define NR_GPIO_IRQ 18
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#define NR_PM_IRQ 19
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#define NR_SYSTEM_TIMER_IRQ 20
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#define NR_GPIO_RISC0_IRQ 21
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#define NR_GPIO_RISC1_IRQ 22
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#define NR_IRQS 23
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/* IRQ Stack Frame Format:
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*
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* Low Address |
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* | regs --> 1 PC (aka R15)
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* | 1 SP (aka R13)
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* | 5 R12 ~ R8
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* | 1 IRQ_STATE
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* | 1 CPSR
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* | 8 R7 ~ R0
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* | 1 R14 (aka R14)
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* High Address v
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*
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* This results in the following set of indices that
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* can be used to access individual registers in the
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* xcp.regs array:
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*/
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#define REG_START (0)
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#define REG_R15 (0)
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#define REG_R13 (1)
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#define REG_R12 (2)
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#define REG_R11 (3)
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#define REG_R10 (4)
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#define REG_R9 (5)
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#define REG_R8 (6)
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#define REG_IRQ_EN (7)
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#define REG_CPSR (8)
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#define REG_R7 (9)
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#define REG_R6 (10)
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#define REG_R5 (11)
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#define REG_R4 (12)
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#define REG_R3 (13)
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#define REG_R2 (14)
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#define REG_R1 (15)
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#define REG_R0 (16)
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#define REG_R14 (17)
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#define REG_END (18)
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#define XCPTCONTEXT_REGS (18)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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#define REG_FP REG_R7
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#define REG_IP REG_R12
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#define REG_SP REG_R13
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/* The PIC register is usually R10. It can be R9 is stack checking is enabled
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* or if the user changes it with -mpic-register on the GCC command line.
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*/
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#define REG_PIC REG_R10
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* This struct defines the way the registers are stored. We
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* need to save:
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*
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* Low Address |
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* | regs --> 1 PC (aka R15)
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* | 1 SP (aka R13)
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* | 5 R12 ~ R8
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* | 1 IRQ_STATE
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* | 1 CPSR
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* | 8 R7 ~ R0
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* | 1 R14 (aka R14)
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* High Address v
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*
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* For a total of 18 (XCPTCONTEXT_REGS).
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*
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* Note: all the register are saved by software, hardware not
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* push register into the stack automatically when interrupt
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* occur.
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*/
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#ifndef __ASSEMBLY__
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struct xcptcontext
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{
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/* The following function pointer is non-zero if there
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* are pending signals to be processed.
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*/
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void *sigdeliver; /* Actual type is sig_deliver_t */
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/* These are saved register array pointer used during
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* signal processing.
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*/
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uint32_t *saved_regs;
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/* Register save area */
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uint32_t *regs;
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};
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Name: up_irq_save, up_irq_restore, and friends.
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*
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* NOTE: This function should never be called from application code and,
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* as a general rule unless you really know what you are doing, this
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* function should not be called directly from operation system code either:
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* Typically, the wrapper functions, enter_critical_section() and
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* leave_critical section(), are probably what you really want.
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*/
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/* Save the current interrupt enable state & disable IRQs. */
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static inline irqstate_t up_irq_save(void)
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{
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irqstate_t r = _IRQ_EN_REG;
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_IRQ_EN_REG = 0;
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return r;
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}
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/* Restore saved IRQ & FIQ state */
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static inline void up_irq_restore(irqstate_t flags)
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{
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_IRQ_EN_REG = flags;
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}
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/* Enable IRQs and return the previous IRQ state */
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static inline irqstate_t up_irq_enable(void)
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{
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irqstate_t r = _IRQ_EN_REG;
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_IRQ_EN_REG = 1;
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return r;
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}
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static inline void up_irq_disable(void)
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{
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up_irq_save();
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}
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static inline void up_disable_irq(int irq)
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{
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_IRQ_MASK_REG &= ~(1 << irq);
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}
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static inline void up_enable_irq(int irq)
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{
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_IRQ_MASK_REG |= (1 << irq);
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}
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static inline uint32_t getcontrol(void)
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{
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return 0;
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}
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_TLSR82_IRQ_H */
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