76 lines
3.1 KiB
C
76 lines
3.1 KiB
C
/****************************************************************************
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* arch/risc-v/include/c906/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_INCLUDE_C906_IRQ_H
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#define __ARCH_RISCV_INCLUDE_C906_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Map RISC-V exception code to NuttX IRQ */
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/* IRQ 0-15 : (exception:interrupt=0) */
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#define C906_IRQ_IAMISALIGNED (0) /* Instruction Address Misaligned */
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#define C906_IRQ_IAFAULT (1) /* Instruction Address Fault */
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#define C906_IRQ_IINSTRUCTION (2) /* Illegal Instruction */
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#define C906_IRQ_BPOINT (3) /* Break Point */
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#define C906_IRQ_LAMISALIGNED (4) /* Load Address Misaligned */
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#define C906_IRQ_LAFAULT (5) /* Load Access Fault */
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#define C906_IRQ_SAMISALIGNED (6) /* Store/AMO Address Misaligned */
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#define C906_IRQ_SAFAULT (7) /* Store/AMO Access Fault */
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#define C906_IRQ_ECALLU (8) /* Environment Call from U-mode */
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#define C906_IRQ_ECALLM (11) /* Environment Call from M-mode */
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/* IRQ 16- : (async event:interrupt=1) */
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#define C906_IRQ_ASYNC (16)
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#define C906_IRQ_SSOFT (C906_IRQ_ASYNC + 1) /* Supervisor Software Int */
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#define C906_IRQ_MSOFT (C906_IRQ_ASYNC + 3) /* Machine Software Int */
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#define C906_IRQ_STIMER (C906_IRQ_ASYNC + 5) /* Supervisor Timer Int */
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#define C906_IRQ_MTIMER (C906_IRQ_ASYNC + 7) /* Machine Timer Int */
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#define C906_IRQ_SEXT (C906_IRQ_ASYNC + 9) /* Supervisor External Int */
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#define C906_IRQ_MEXT (C906_IRQ_ASYNC + 11) /* Machine External Int */
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#define C906_IRQ_HPMOV (C906_IRQ_ASYNC + 17) /* HPM Overflow Int */
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/* Machine Global External Interrupt */
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#define C906_IRQ_PERI_START (C906_IRQ_ASYNC + 18)
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#ifdef CONFIG_C906_WITH_QEMU
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#define C906_IRQ_UART0 (C906_IRQ_PERI_START + 32)
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#else
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#define C906_IRQ_UART0 (C906_IRQ_PERI_START + 32)
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#endif
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/* Total number of IRQs */
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#define NR_IRQS (C906_IRQ_UART0 + 1)
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#endif /* __ARCH_RISCV_INCLUDE_C906_IRQ_H */
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