169 lines
5.5 KiB
C
169 lines
5.5 KiB
C
/****************************************************************************
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* arch/ceva/include/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_CEVA_INCLUDE_IRQ_H
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#define __ARCH_CEVA_INCLUDE_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <sys/types.h>
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#ifndef __ASSEMBLY__
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# include <stdbool.h>
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#endif
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/* Include chip-specific IRQ definitions (including IRQ numbers) */
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#include <arch/chip/irq.h>
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/* Include CEVA architecture-specific IRQ definitions (including register
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* save structure and up_irq_save()/up_irq_restore() functions)
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*/
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#if defined(CONFIG_ARCH_XC5)
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# include <arch/xc5/irq.h>
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#elif defined(CONFIG_ARCH_XM6)
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# include <arch/xm6/irq.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define IRQ_VINT0 (IRQ_VINT_FIRST + 0)
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#define IRQ_VINT1 (IRQ_VINT_FIRST + 1)
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#define IRQ_VINT2 (IRQ_VINT_FIRST + 2)
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#define IRQ_VINT3 (IRQ_VINT_FIRST + 3)
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#define IRQ_VINT4 (IRQ_VINT_FIRST + 4)
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#define IRQ_VINT5 (IRQ_VINT_FIRST + 5)
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#define IRQ_VINT6 (IRQ_VINT_FIRST + 6)
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#define IRQ_VINT7 (IRQ_VINT_FIRST + 7)
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#define IRQ_VINT8 (IRQ_VINT_FIRST + 8)
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#define IRQ_VINT9 (IRQ_VINT_FIRST + 9)
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#define IRQ_VINT10 (IRQ_VINT_FIRST + 10)
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#define IRQ_VINT11 (IRQ_VINT_FIRST + 11)
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#define IRQ_VINT12 (IRQ_VINT_FIRST + 12)
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#define IRQ_VINT13 (IRQ_VINT_FIRST + 13)
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#define IRQ_VINT14 (IRQ_VINT_FIRST + 14)
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#define IRQ_VINT15 (IRQ_VINT_FIRST + 15)
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#define IRQ_VINT16 (IRQ_VINT_FIRST + 16)
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#define IRQ_VINT17 (IRQ_VINT_FIRST + 17)
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#define IRQ_VINT18 (IRQ_VINT_FIRST + 18)
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#define IRQ_VINT19 (IRQ_VINT_FIRST + 19)
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#define IRQ_VINT20 (IRQ_VINT_FIRST + 20)
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#define IRQ_VINT21 (IRQ_VINT_FIRST + 21)
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#define IRQ_VINT22 (IRQ_VINT_FIRST + 22)
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#define IRQ_VINT23 (IRQ_VINT_FIRST + 23)
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#define IRQ_VINT24 (IRQ_VINT_FIRST + 24)
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#define IRQ_VINT25 (IRQ_VINT_FIRST + 25)
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#define IRQ_VINT26 (IRQ_VINT_FIRST + 26)
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/* g_current_regs[] holds a references to the current interrupt level
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* register storage structure. If is non-NULL only during interrupt
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* processing. Access to g_current_regs[] must be through the macro
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* CURRENT_REGS for portability.
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*/
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/* For the case of architectures with multiple CPUs, then there must be one
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* such value for each processor that can receive an interrupt.
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*/
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EXTERN uint32_t *volatile g_current_regs[CONFIG_SMP_NCPUS];
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#define CURRENT_REGS (g_current_regs[up_cpu_index()])
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: up_cpu_index
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*
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* Description:
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* Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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****************************************************************************/
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#ifdef CONFIG_SMP
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int up_cpu_index(void);
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#else
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# define up_cpu_index() (0)
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_interrupt_context
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*
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* Description:
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* Return true is we are currently executing in the interrupt
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* handler context.
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*
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****************************************************************************/
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static inline bool up_interrupt_context(void)
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{
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#ifdef CONFIG_SMP
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irqstate_t flags = up_irq_save();
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#endif
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bool ret = CURRENT_REGS != NULL;
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#ifdef CONFIG_SMP
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up_irq_restore(flags);
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#endif
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return ret;
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}
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_CEVA_INCLUDE_IRQ_H */
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