207 lines
12 KiB
C
207 lines
12 KiB
C
/************************************************************************************
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* arch/arm/include/kinetis/kinetis_k66irq.h
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*
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* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K66IRQ_H
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#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K66IRQ_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map
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* directly to bits in the NVIC. This does, however, waste several words of
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* memory in the IRQ to handle mapping tables.
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*
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* Processor Exceptions (vectors 0-15). These common definitions can be found
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* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
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*
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* External interrupts (vectors >= 16)
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*
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* K66 Family ************************************************************************
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*
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* The interrupt vectors for the following parts is defined in Freescale
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* document K66P144M180SF5RMV2
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*/
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#define KINETIS_IRQ_DMACH0 (KINETIS_IRQ_FIRST + 0) /* 0: DMA channel 0, 16 transfer complete */
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#define KINETIS_IRQ_DMACH1 (KINETIS_IRQ_FIRST + 1) /* 1: DMA channel 1, 17 transfer complete */
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#define KINETIS_IRQ_DMACH2 (KINETIS_IRQ_FIRST + 2) /* 2: DMA channel 2, 18 transfer complete */
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#define KINETIS_IRQ_DMACH3 (KINETIS_IRQ_FIRST + 3) /* 3: DMA channel 3, 19 transfer complete */
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#define KINETIS_IRQ_DMACH4 (KINETIS_IRQ_FIRST + 4) /* 4: DMA channel 4, 20 transfer complete */
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#define KINETIS_IRQ_DMACH5 (KINETIS_IRQ_FIRST + 5) /* 5: DMA channel 5, 21 transfer complete */
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#define KINETIS_IRQ_DMACH6 (KINETIS_IRQ_FIRST + 6) /* 6: DMA channel 6, 11 transfer complete */
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#define KINETIS_IRQ_DMACH7 (KINETIS_IRQ_FIRST + 7) /* 7: DMA channel 7, 23 transfer complete */
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#define KINETIS_IRQ_DMACH8 (KINETIS_IRQ_FIRST + 8) /* 8: DMA channel 8, 24 transfer complete */
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#define KINETIS_IRQ_DMACH9 (KINETIS_IRQ_FIRST + 9) /* 9: DMA channel 9, 25 transfer complete */
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#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST + 10) /* 10: DMA channel 10, 26 transfer complete */
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#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST + 11) /* 11: DMA channel 11, 27 transfer complete */
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#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST + 12) /* 12: DMA channel 12, 28 transfer complete */
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#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST + 13) /* 13: DMA channel 13, 29 transfer complete */
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#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST + 14) /* 14: DMA channel 14, 30 transfer complete */
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#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST + 15) /* 15: DMA channel 15, 31 transfer complete */
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#define KINETIS_IRQ_DMAERR (KINETIS_IRQ_FIRST + 16) /* 16: DMA error interrupt channels 0-31 */
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#define KINETIS_IRQ_MCM (KINETIS_IRQ_FIRST + 17) /* 17: MCM Normal interrupt */
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#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST + 18) /* 18: Flash memory command complete */
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#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST + 19) /* 19: Flash memory read collision */
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#define KINETIS_IRQ_SMCLVD (KINETIS_IRQ_FIRST + 20) /* 20: Mode Controller low-voltage
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* detect, low-voltage warning */
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#define KINETIS_IRQ_LLWU (KINETIS_IRQ_FIRST + 21) /* 21: LLWU Normal Low Leakage Wakeup */
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#define KINETIS_IRQ_WDOG (KINETIS_IRQ_FIRST + 22) /* 22: Watchdog or EWM */
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#define KINETIS_IRQ_RNGB (KINETIS_IRQ_FIRST + 23) /* 23: Random number generator */
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#define KINETIS_IRQ_I2C0 (KINETIS_IRQ_FIRST + 24) /* 24: I2C0 */
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#define KINETIS_IRQ_I2C1 (KINETIS_IRQ_FIRST + 25) /* 25: I2C1 */
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#define KINETIS_IRQ_SPI0 (KINETIS_IRQ_FIRST + 26) /* 26: SPI0 all sources */
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#define KINETIS_IRQ_SPI1 (KINETIS_IRQ_FIRST + 27) /* 27: SPI1 all sources */
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#define KINETIS_IRQ_I2S0 (KINETIS_IRQ_FIRST + 28) /* 28: 12S0 Transmit */
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#define KINETIS_IRQ_I2S1 (KINETIS_IRQ_FIRST + 29) /* 29: 12S0 Receive */
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#define KINETIS_IRQ_RESVD30 (KINETIS_IRQ_FIRST + 30) /* 30: Reserved */
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#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST + 31) /* 31: UART0 status */
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#define KINETIS_IRQ_UART0E (KINETIS_IRQ_FIRST + 32) /* 32: UART0 error */
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#define KINETIS_IRQ_UART1S (KINETIS_IRQ_FIRST + 33) /* 33: UART1 status */
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#define KINETIS_IRQ_UART1E (KINETIS_IRQ_FIRST + 34) /* 34: UART1 error */
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#define KINETIS_IRQ_UART2S (KINETIS_IRQ_FIRST + 35) /* 35: UART2 status */
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#define KINETIS_IRQ_UART2E (KINETIS_IRQ_FIRST + 36) /* 36: UART2 error */
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#define KINETIS_IRQ_UART3S (KINETIS_IRQ_FIRST + 37) /* 37: UART3 status */
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#define KINETIS_IRQ_UART3E (KINETIS_IRQ_FIRST + 38) /* 38: UART3 error */
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#define KINETIS_IRQ_ADC0 (KINETIS_IRQ_FIRST + 39) /* 39: ADC0 */
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#define KINETIS_IRQ_CMP0 (KINETIS_IRQ_FIRST + 40) /* 40: CMP0 */
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#define KINETIS_IRQ_CMP1 (KINETIS_IRQ_FIRST + 41) /* 41: CMP1 */
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#define KINETIS_IRQ_FTM0 (KINETIS_IRQ_FIRST + 42) /* 42: FTM0 all sources */
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#define KINETIS_IRQ_FTM1 (KINETIS_IRQ_FIRST + 43) /* 43: FTM1 all sources */
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#define KINETIS_IRQ_FTM2 (KINETIS_IRQ_FIRST + 44) /* 44: FTM2 all sources */
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#define KINETIS_IRQ_CMT (KINETIS_IRQ_FIRST + 45) /* 45: CMT */
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#define KINETIS_IRQ_RTC (KINETIS_IRQ_FIRST + 46) /* 46: RTC alarm interrupt */
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#define KINETIS_IRQ_RTCS (KINETIS_IRQ_FIRST + 47) /* 47: RTC seconds interrupt */
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#define KINETIS_IRQ_PITCH0 (KINETIS_IRQ_FIRST + 48) /* 48: PIT channel 0 */
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#define KINETIS_IRQ_PITCH1 (KINETIS_IRQ_FIRST + 49) /* 49: PIT channel 1 */
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#define KINETIS_IRQ_PITCH2 (KINETIS_IRQ_FIRST + 50) /* 50: PIT channel 2 */
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#define KINETIS_IRQ_PITCH3 (KINETIS_IRQ_FIRST + 51) /* 51: PIT channel 3 */
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#define KINETIS_IRQ_PDB (KINETIS_IRQ_FIRST + 52) /* 52: PDB */
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#define KINETIS_IRQ_USBOTG (KINETIS_IRQ_FIRST + 53) /* 53: USB OTG */
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#define KINETIS_IRQ_USBCD (KINETIS_IRQ_FIRST + 54) /* 54: USB charger detect */
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#define KINETIS_IRQ_RESVD55 (KINETIS_IRQ_FIRST + 55) /* 55: Reserved */
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#define KINETIS_IRQ_DAC0 (KINETIS_IRQ_FIRST + 56) /* 56: DAC0 */
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#define KINETIS_IRQ_MCG (KINETIS_IRQ_FIRST + 57) /* 57: MCG */
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#define KINETIS_IRQ_LPT (KINETIS_IRQ_FIRST + 58) /* 58: Low power timer */
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#define KINETIS_IRQ_PORTA (KINETIS_IRQ_FIRST + 59) /* 59: Pin detect port A */
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#define KINETIS_IRQ_PORTB (KINETIS_IRQ_FIRST + 60) /* 60: Pin detect port B */
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#define KINETIS_IRQ_PORTC (KINETIS_IRQ_FIRST + 61) /* 61: Pin detect port C */
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#define KINETIS_IRQ_PORTD (KINETIS_IRQ_FIRST + 62) /* 62: Pin detect port D */
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#define KINETIS_IRQ_PORTE (KINETIS_IRQ_FIRST + 63) /* 63: Pin detect port E */
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#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST + 64) /* 64: Software interrupt */
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#define KINETIS_IRQ_SPI2 (KINETIS_IRQ_FIRST + 65) /* 65: SPI2 all sources */
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#define KINETIS_IRQ_UART4S (KINETIS_IRQ_FIRST + 66) /* 66: UART4 status */
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#define KINETIS_IRQ_UART4E (KINETIS_IRQ_FIRST + 67) /* 67: UART4 error */
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#define KINETIS_IRQ_RESVD68 (KINETIS_IRQ_FIRST + 68) /* 68: Reserved */
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#define KINETIS_IRQ_RESVD69 (KINETIS_IRQ_FIRST + 69) /* 69: Reserved */
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#define KINETIS_IRQ_CMP2 (KINETIS_IRQ_FIRST + 70) /* 70: CMP2 */
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#define KINETIS_IRQ_FTM3 (KINETIS_IRQ_FIRST + 71) /* 71: FTM3 all sources */
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#define KINETIS_IRQ_DAC1 (KINETIS_IRQ_FIRST + 72) /* 72: DAC1 */
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#define KINETIS_IRQ_ADC1 (KINETIS_IRQ_FIRST + 73) /* 73: ADC1 */
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#define KINETIS_IRQ_I2C2 (KINETIS_IRQ_FIRST + 74) /* 74: I2C2 */
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#define KINETIS_IRQ_CAN0MB (KINETIS_IRQ_FIRST + 75) /* 75: CAN0 OR'ed Message buffer (0-15) */
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#define KINETIS_IRQ_CAN0BO (KINETIS_IRQ_FIRST + 76) /* 76: CAN0 Bus Off */
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#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST + 77) /* 77: CAN0 Error */
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#define KINETIS_IRQ_CAN0TW (KINETIS_IRQ_FIRST + 78) /* 78: CAN0 Transmit Warning */
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#define KINETIS_IRQ_CAN0RW (KINETIS_IRQ_FIRST + 79) /* 79: CAN0 Receive Warning */
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#define KINETIS_IRQ_CAN0WU (KINETIS_IRQ_FIRST + 80) /* 80: CAN0 Wake UP */
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#define KINETIS_IRQ_SDHC (KINETIS_IRQ_FIRST + 81) /* 81: SDHC */
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#define KINETIS_IRQ_EMACTMR (KINETIS_IRQ_FIRST + 82) /* 82: Ethernet MAC IEEE 1588 timer interrupt */
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#define KINETIS_IRQ_EMACTX (KINETIS_IRQ_FIRST + 83) /* 83: Ethernet MAC transmit interrupt */
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#define KINETIS_IRQ_EMACRX (KINETIS_IRQ_FIRST + 84) /* 84: Ethernet MAC receive interrupt */
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#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST + 85) /* 85: Ethernet MAC error and misc interrupt */
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#define KINETIS_IRQ_LPUART0 (KINETIS_IRQ_FIRST + 86) /* 86: LPUART0 Status and error */
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#define KINETIS_IRQ_TSI0 (KINETIS_IRQ_FIRST + 87) /* 87: TSI0 */
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#define KINETIS_IRQ_TPM1 (KINETIS_IRQ_FIRST + 88) /* 88: TPM1 */
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#define KINETIS_IRQ_TPM2 (KINETIS_IRQ_FIRST + 89) /* 89: TPM2 */
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#define KINETIS_IRQ_USBHSDCD (KINETIS_IRQ_FIRST + 90) /* 90: shared by USBHS DCD & USBHS Phy modules */
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#define KINETIS_IRQ_I2C3 (KINETIS_IRQ_FIRST + 91) /* 91: I2C3 */
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#define KINETIS_IRQ_CMP3 (KINETIS_IRQ_FIRST + 92) /* 92: CMP3 */
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#define KINETIS_IRQ_USBHSOTG (KINETIS_IRQ_FIRST + 93) /* 93: USBHS OTG*/
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#define KINETIS_IRQ_CAN1MB (KINETIS_IRQ_FIRST + 94) /* 94: CAN1 OR'ed Message buffer (0-15) */
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#define KINETIS_IRQ_CAN1BO (KINETIS_IRQ_FIRST + 95) /* 95: CAN1 Bus Off */
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#define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST + 96) /* 96: CAN1 Error */
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#define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST + 97) /* 97: CAN1 Transmit Warning */
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#define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST + 98) /* 98: CAN1 Receive Warning */
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#define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST + 99) /* 99: CAN1 Wake UP */
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#define KINETIS_IRQ_NEXTINTS 100 /* 100 Non core IRQs*/
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#define KINETIS_IRQ_NVECTORS (KINETIS_IRQ_FIRST + KINETIS_IRQ_NEXTINTS) /* 116 vectors */
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/* EXTI interrupts (Do not use IRQ numbers) */
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#define NR_IRQS KINETIS_IRQ_NVECTORS
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K66IRQ_H */
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