8e30c13441
This PR adds support for the SOPHGO SG2000 SoC, based on T-Head C906 64-bit RISC-V Core. This will be used by the upcoming port of NuttX for Milk-V Duo S SBC. Most of the code was derived from NuttX for Ox64 BL808. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-sg2000 Modified Files in arch/risc-v: `Kconfig`: Added ARCH_CHIP_SG2000 for SG2000 SoC New Files in arch/risc-v: `include/sg2000/chip.h`: SG2000 Definitions `include/sg2000/irq.h`: External Interrupts `src/sg2000/chip.h`: Interrupt Stack Macro `src/sg2000/sg2000_allocateheap.c`: Kernel Heap `src/sg2000/sg2000_head.S`: Linux Header and Boot Code `src/sg2000/sg2000_irq.c`: Configure Interrupts `src/sg2000/sg2000_irq_dispatch.c`: Dispatch Interrupts `src/sg2000/sg2000_memorymap.h`: Memory Map `src/sg2000/sg2000_mm_init.c`, `sg2000_mm_init.h`: Memory Mgmt `src/sg2000/sg2000_pgalloc.c`: Page Allocator `src/sg2000/sg2000_start.c`: Startup Code `src/sg2000/sg2000_timerisr.c`: Timer Interrupt `src/sg2000/hardware/sg2000_memorymap.h`: PLIC and UART Base Address `src/sg2000/hardware/sg2000_plic.h`: PLIC Register Addresses `src/sg2000/Kconfig`: SG2000 Config `src/sg2000/Make.defs`: Makefile |
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.. | ||
arm | ||
arm64 | ||
avr | ||
ceva | ||
dummy | ||
hc | ||
mips | ||
misoc | ||
or1k | ||
renesas | ||
risc-v | ||
sim | ||
sparc | ||
tricore | ||
x86 | ||
x86_64 | ||
xtensa | ||
z16 | ||
z80 | ||
CMakeLists.txt | ||
Kconfig |