413 lines
13 KiB
C
413 lines
13 KiB
C
/****************************************************************************
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* arch/arm/include/armv7-a/irq.h
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*
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* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_ARMV7_A_IRQ_H
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#define __ARCH_ARM_INCLUDE_ARMV7_A_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/irq.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <arch/arch.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* IRQ Stack Frame Format:
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*
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* Context is always saved/restored in the same way:
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*
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* (1) stmia rx, {r0-r14}
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* (2) then the PC and CPSR
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*
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* This results in the following set of indices that can be used to access
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* individual registers in the xcp.regs array:
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*/
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#define REG_R0 (0)
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#define REG_R1 (1)
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#define REG_R2 (2)
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#define REG_R3 (3)
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#define REG_R4 (4)
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#define REG_R5 (5)
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#define REG_R6 (6)
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#define REG_R7 (7)
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#define REG_R8 (8)
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#define REG_R9 (9)
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#define REG_R10 (10)
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#define REG_R11 (11)
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#define REG_R12 (12)
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#define REG_R13 (13)
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#define REG_R14 (14)
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#define REG_R15 (15)
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#define REG_CPSR (16)
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#define ARM_CONTEXT_REGS (17)
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/* If the MCU supports a floating point unit, then it will be necessary
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* to save the state of the FPU status register and data registers on
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* each context switch. These registers are not saved during interrupt
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* level processing, however. So, as a consequence, floating point
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* operations may NOT be performed in interrupt handlers.
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*
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* The FPU provides an extension register file containing 32 single-
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* precision registers. These can be viewed as:
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*
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* - Sixteen 64-bit double word registers, D0-D15
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* - Thirty-two 32-bit single-word registers, S0-S31
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* S<2n> maps to the least significant half of D<n>
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* S<2n+1> maps to the most significant half of D<n>.
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*/
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#ifdef CONFIG_ARCH_FPU
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# define REG_D0 (ARM_CONTEXT_REGS+0) /* D0 */
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# define REG_S0 (ARM_CONTEXT_REGS+0) /* S0 */
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# define REG_S1 (ARM_CONTEXT_REGS+1) /* S1 */
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# define REG_D1 (ARM_CONTEXT_REGS+2) /* D1 */
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# define REG_S2 (ARM_CONTEXT_REGS+2) /* S2 */
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# define REG_S3 (ARM_CONTEXT_REGS+3) /* S3 */
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# define REG_D2 (ARM_CONTEXT_REGS+4) /* D2 */
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# define REG_S4 (ARM_CONTEXT_REGS+4) /* S4 */
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# define REG_S5 (ARM_CONTEXT_REGS+5) /* S5 */
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# define REG_D3 (ARM_CONTEXT_REGS+6) /* D3 */
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# define REG_S6 (ARM_CONTEXT_REGS+6) /* S6 */
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# define REG_S7 (ARM_CONTEXT_REGS+7) /* S7 */
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# define REG_D4 (ARM_CONTEXT_REGS+8) /* D4 */
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# define REG_S8 (ARM_CONTEXT_REGS+8) /* S8 */
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# define REG_S9 (ARM_CONTEXT_REGS+9) /* S9 */
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# define REG_D5 (ARM_CONTEXT_REGS+10) /* D5 */
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# define REG_S10 (ARM_CONTEXT_REGS+10) /* S10 */
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# define REG_S11 (ARM_CONTEXT_REGS+11) /* S11 */
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# define REG_D6 (ARM_CONTEXT_REGS+12) /* D6 */
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# define REG_S12 (ARM_CONTEXT_REGS+12) /* S12 */
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# define REG_S13 (ARM_CONTEXT_REGS+13) /* S13 */
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# define REG_D7 (ARM_CONTEXT_REGS+14) /* D7 */
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# define REG_S14 (ARM_CONTEXT_REGS+14) /* S14 */
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# define REG_S15 (ARM_CONTEXT_REGS+15) /* S15 */
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# define REG_D8 (ARM_CONTEXT_REGS+16) /* D8 */
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# define REG_S16 (ARM_CONTEXT_REGS+16) /* S16 */
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# define REG_S17 (ARM_CONTEXT_REGS+17) /* S17 */
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# define REG_D9 (ARM_CONTEXT_REGS+18) /* D9 */
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# define REG_S18 (ARM_CONTEXT_REGS+18) /* S18 */
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# define REG_S19 (ARM_CONTEXT_REGS+19) /* S19 */
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# define REG_D10 (ARM_CONTEXT_REGS+20) /* D10 */
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# define REG_S20 (ARM_CONTEXT_REGS+20) /* S20 */
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# define REG_S21 (ARM_CONTEXT_REGS+21) /* S21 */
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# define REG_D11 (ARM_CONTEXT_REGS+22) /* D11 */
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# define REG_S22 (ARM_CONTEXT_REGS+22) /* S22 */
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# define REG_S23 (ARM_CONTEXT_REGS+23) /* S23 */
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# define REG_D12 (ARM_CONTEXT_REGS+24) /* D12 */
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# define REG_S24 (ARM_CONTEXT_REGS+24) /* S24 */
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# define REG_S25 (ARM_CONTEXT_REGS+25) /* S25 */
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# define REG_D13 (ARM_CONTEXT_REGS+26) /* D13 */
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# define REG_S26 (ARM_CONTEXT_REGS+26) /* S26 */
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# define REG_S27 (ARM_CONTEXT_REGS+27) /* S27 */
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# define REG_D14 (ARM_CONTEXT_REGS+28) /* D14 */
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# define REG_S28 (ARM_CONTEXT_REGS+28) /* S28 */
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# define REG_S29 (ARM_CONTEXT_REGS+29) /* S29 */
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# define REG_D15 (ARM_CONTEXT_REGS+30) /* D15 */
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# define REG_S30 (ARM_CONTEXT_REGS+30) /* S30 */
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# define REG_S31 (ARM_CONTEXT_REGS+31) /* S31 */
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# define REG_FPSCR (ARM_CONTEXT_REGS+32) /* Floating point status and control */
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# define FPU_CONTEXT_REGS (33)
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#else
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# define FPU_CONTEXT_REGS (0)
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#endif
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/* The total number of registers saved by software */
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#define XCPTCONTEXT_REGS (ARM_CONTEXT_REGS + FPU_CONTEXT_REGS)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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/* Friendly register names */
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#define REG_A1 REG_R0
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#define REG_A2 REG_R1
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#define REG_A3 REG_R2
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#define REG_A4 REG_R3
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#define REG_V1 REG_R4
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#define REG_V2 REG_R5
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#define REG_V3 REG_R6
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#define REG_V4 REG_R7
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#define REG_V5 REG_R8
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#define REG_V6 REG_R9
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#define REG_V7 REG_R10
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#define REG_SB REG_R9
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#define REG_SL REG_R10
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#define REG_FP REG_R11
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#define REG_IP REG_R12
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#define REG_SP REG_R13
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/* The PIC register is usually R10. It can be R9 is stack checking is enabled
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* or if the user changes it with -mpic-register on the GCC command line.
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*/
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#define REG_PIC REG_R10
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* This structure represents the return state from a system call */
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#ifdef CONFIG_LIB_SYSCALL
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struct xcpt_syscall_s
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{
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#ifdef CONFIG_BUILD_KERNEL
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uint32_t cpsr; /* The CPSR value */
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#endif
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uint32_t sysreturn; /* The return PC */
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};
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#endif
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/* This struct defines the way the registers are stored. We need to save:
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*
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* 1 CPSR
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* 7 Static registers, v1-v7 (aka r4-r10)
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* 1 Frame pointer, fp (aka r11)
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* 1 Stack pointer, sp (aka r13)
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* 1 Return address, lr (aka r14)
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* ---
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* 11 (XCPTCONTEXT_USER_REG)
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*
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* On interrupts, we also need to save:
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* 4 Volatile registers, a1-a4 (aka r0-r3)
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* 1 Scratch Register, ip (aka r12)
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*---
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* 5 (XCPTCONTEXT_IRQ_REGS)
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*
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* For a total of 17 (XCPTCONTEXT_REGS)
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*/
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#ifndef __ASSEMBLY__
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struct xcptcontext
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{
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/* The following function pointer is non-zero if there are pending signals
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* to be processed.
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*/
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#ifndef CONFIG_DISABLE_SIGNALS
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void *sigdeliver; /* Actual type is sig_deliver_t */
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/* These are saved copies of LR and CPSR used during signal processing. */
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uint32_t saved_pc;
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uint32_t saved_cpsr;
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# ifdef CONFIG_BUILD_KERNEL
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/* This is the saved address to use when returning from a user-space
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* signal handler.
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*/
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uint32_t sigreturn;
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# endif
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#endif
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/* Register save area */
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uint32_t regs[XCPTCONTEXT_REGS];
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/* Extra fault address register saved for common paging logic. In the
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* case of the pre-fetch abort, this value is the same as regs[REG_R15];
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* For the case of the data abort, this value is the value of the fault
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* address register (FAR) at the time of data abort exception.
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*/
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#ifdef CONFIG_PAGING
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uintptr_t far;
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#endif
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#ifdef CONFIG_LIB_SYSCALL
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/* The following array holds the return address and the exc_return value
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* needed to return from each nested system call.
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*/
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uint8_t nsyscalls;
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struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
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#endif
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#ifdef CONFIG_ARCH_ADDRENV
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#ifdef CONFIG_ARCH_STACK_DYNAMIC
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/* This array holds the physical address of the level 2 page table used
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* to map the thread's stack memory. This array will be initially of
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* zeroed and would be back-up up with pages during page fault exception
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* handling to support dynamically sized stacks for each thread.
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*/
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FAR uintptr_t *ustack[ARCH_STACK_NSECTS];
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#endif
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#ifdef CONFIG_ARCH_KERNEL_STACK
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/* In this configuration, all syscalls execute from an internal kernel
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* stack. Why? Because when we instantiate and initialize the address
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* environment of the new user process, we will temporarily lose the
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* address environment of the old user process, including its stack
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* contents. The kernel C logic will crash immediately with no valid
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* stack in place.
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*/
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FAR uint32_t *ustkptr; /* Saved user stack pointer */
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FAR uint32_t *kstack; /* Allocate base of the (aligned) kernel stack */
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#ifndef CONFIG_DISABLE_SIGNALS
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FAR uint32_t *kstkptr; /* Saved kernel stack pointer */
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#endif
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#endif
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#endif
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};
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#endif
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Return the current IRQ state */
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static inline irqstate_t irqstate(void)
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{
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unsigned int cpsr;
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__asm__ __volatile__
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(
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"\tmrs %0, cpsr\n"
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: "=r" (cpsr)
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:
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: "memory"
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);
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return cpsr;
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}
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/* Disable IRQs and return the previous IRQ state */
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static inline irqstate_t irqsave(void)
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{
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unsigned int cpsr;
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__asm__ __volatile__
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(
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"\tmrs %0, cpsr\n"
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"\tcpsid i\n"
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#if defined(CONFIG_ARMV7A_DECODEFIQ)
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"\tcpsid f\n"
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#endif
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: "=r" (cpsr)
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:
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: "memory"
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);
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return cpsr;
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}
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/* Enable IRQs and return the previous IRQ state */
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static inline irqstate_t irqenable(void)
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{
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unsigned int cpsr;
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__asm__ __volatile__
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(
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"\tmrs %0, cpsr\n"
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"\tcpsie i\n"
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#if defined(CONFIG_ARMV7A_DECODEFIQ)
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"\tcpsie f\n"
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#endif
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: "=r" (cpsr)
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:
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: "memory"
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);
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return cpsr;
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}
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/* Restore saved IRQ & FIQ state */
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static inline void irqrestore(irqstate_t flags)
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{
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__asm__ __volatile__
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(
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"msr cpsr_c, %0"
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:
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: "r" (flags)
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: "memory"
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);
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}
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_ARMV7_A_IRQ_H */
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